From: Joerg Roedel <joro@8bytes.org>
To: Varun Sethi <Varun.Sethi@freescale.com>
Cc: joerg.roedel@amd.com, linux-kernel@vger.kernel.org,
iommu@lists.linux-foundation.org, scottwood@freescale.com,
linuxppc-dev@lists.ozlabs.org, timur@freescale.com
Subject: Re: [PATCH 3/4 v5] iommu/fsl: Add iommu domain attributes required by fsl PAMU driver.
Date: Sun, 2 Dec 2012 15:03:23 +0100 [thread overview]
Message-ID: <20121202140323.GO30633@8bytes.org> (raw)
In-Reply-To: <1353419697-31269-4-git-send-email-Varun.Sethi@freescale.com>
Hmm, we need to work out a good abstraction for this.
On Tue, Nov 20, 2012 at 07:24:56PM +0530, Varun Sethi wrote:
> Added the following domain attributes required by FSL PAMU driver:
> 1. Subwindows field added to the iommu domain geometry attribute.
Are the Subwindows mapped with full size or do you map only parts of the
subwindows?
> + * This attribute indicates number of DMA subwindows supported by
> + * the geometry. If there is a single window that maps the entire
> + * geometry, attribute must be set to "1". A value of "0" implies
> + * that this mechanism is not used at all(normal paging is used).
> + * Value other than* "0" or "1" indicates the actual number of
> + * subwindows.
> + */
This semantic is ugly, how about a feature detection mechanism?
> +struct iommu_stash_attribute {
> + u32 cpu; /* cpu number */
> + u32 cache; /* cache to stash to: L1,L2,L3 */
> };
>
> struct iommu_domain {
> @@ -60,6 +95,14 @@ struct iommu_domain {
> enum iommu_attr {
> DOMAIN_ATTR_MAX,
> DOMAIN_ATTR_GEOMETRY,
> + /* Set the IOMMU hardware stashing
> + * parameters.
> + */
> + DOMAIN_ATTR_STASH,
> + /* Explicity enable/disable DMA for a
> + * particular memory window.
> + */
> + DOMAIN_ATTR_ENABLE,
> };
When you add implementation specific attributes please add some
indication to the names that it is only for PAMU. DOMAIN_ATTR_STASH
sounds too generic.
Joerg
next prev parent reply other threads:[~2012-12-02 14:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-20 13:54 [PATCH 0/4] iommu/fsl: Freescale PAMU driver and IOMMU API implementation Varun Sethi
2012-11-20 13:54 ` [PATCH 1/4 v2] iommu/fsl: Store iommu domain information pointer in archdata Varun Sethi
2012-11-26 5:33 ` Sethi Varun-B16395
2012-11-28 17:35 ` Kumar Gala
2012-11-20 13:54 ` [PATCH 2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure Varun Sethi
2012-11-25 13:21 ` Kumar Gala
2012-11-20 13:54 ` [PATCH 3/4 v5] iommu/fsl: Add iommu domain attributes required by fsl PAMU driver Varun Sethi
2012-11-26 5:24 ` Sethi Varun-B16395
2012-12-02 8:12 ` Sethi Varun-B16395
2012-12-02 14:03 ` Joerg Roedel [this message]
2012-12-02 15:11 ` Tabi Timur-B04825
2012-12-03 16:57 ` Sethi Varun-B16395
2012-12-03 17:03 ` Scott Wood
2012-12-04 11:53 ` Sethi Varun-B16395
2012-12-04 18:22 ` Scott Wood
2012-12-10 10:10 ` Sethi Varun-B16395
2012-12-11 1:00 ` Scott Wood
2012-12-11 4:50 ` Sethi Varun-B16395
2012-12-03 17:27 ` Joerg Roedel
2012-12-03 17:36 ` Scott Wood
2012-11-20 13:54 ` [PATCH 4/4 v5] iommu/fsl: Freescale PAMU driver and IOMMU API implementation Varun Sethi
2012-11-20 22:52 ` Timur Tabi
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