From: Ram Pai <linuxram@us.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: mpe@ellerman.id.au, hbabu@us.ibm.com, nacc@us.ibm.com
Subject: [PATCH] nx-842: Ignore bit 3 of condition register returned by icswx
Date: Fri, 30 Oct 2015 15:31:20 -0700 [thread overview]
Message-ID: <20151030223120.GA22550@ram.oc3035372033.ibm.com> (raw)
icswx occasionally under heavy load sets bit 3 of condition register 0.
It has no software implication.
Currently that bit is interpreted by the driver as a failure, when
it should have calmly ignored it.
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
---
arch/powerpc/include/asm/icswx.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h
index 9f8402b..bce20c7 100644
--- a/arch/powerpc/include/asm/icswx.h
+++ b/arch/powerpc/include/asm/icswx.h
@@ -177,7 +177,7 @@ static inline int icswx(__be32 ccw, struct coprocessor_request_block *crb)
: "r" (ccw_reg), "r" (crb)
: "cr0", "memory");
- return (int)((cr >> 28) & 0xf);
+ return (int)((cr >> 28) & 0xe);
}
next reply other threads:[~2015-10-30 22:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-30 22:31 Ram Pai [this message]
2015-11-02 1:23 ` [PATCH] nx-842: Ignore bit 3 of condition register returned by icswx Michael Ellerman
2015-11-02 18:41 ` Ram Pai
2015-11-02 22:24 ` Michael Ellerman
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