From: Anton Blanchard <anton@samba.org>
To: Michael Ellerman <mpe@ellerman.id.au>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: [PATCH] powerpc: Improve comment explaining why we modify VRSAVE
Date: Fri, 20 May 2016 04:41:34 +1000 [thread overview]
Message-ID: <20160520044134.62712b79@kryten> (raw)
The comment explaining why we modify VRSAVE is misleading, glibc
does rely on the behaviour. Update the comment.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 1c2e7a3..3907fcf 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -70,10 +70,11 @@ _GLOBAL(load_up_altivec)
MTMSRD(r5) /* enable use of AltiVec now */
isync
- /* Hack: if we get an altivec unavailable trap with VRSAVE
- * set to all zeros, we assume this is a broken application
- * that fails to set it properly, and thus we switch it to
- * all 1's
+ /*
+ * While userspace in general ignores VRSAVE, glibc uses it as a
+ * boolean to optimise userspace context save/restore. Whenever we
+ * take an altivec unavailable exception we must set VRSAVE to
+ * something non zero. Set it to all 1s.
*/
mfspr r4,SPRN_VRSAVE
cmpwi 0,r4,0
next reply other threads:[~2016-05-19 18:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-19 18:41 Anton Blanchard [this message]
2016-05-23 7:54 ` [PATCH] powerpc: Improve comment explaining why we modify VRSAVE Cyril Bur
2016-07-27 14:32 ` Michael Ellerman
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