From: Bjorn Helgaas <helgaas@kernel.org>
To: Yongji Xie <xyjxie@linux.vnet.ibm.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-doc@vger.kernel.org,
bhelgaas@google.com, alex.williamson@redhat.com, aik@ozlabs.ru,
benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au,
corbet@lwn.net, warrier@linux.vnet.ibm.com,
zhong@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com,
gwshan@linux.vnet.ibm.com
Subject: Re: [RESEND PATCH v2 2/4] PCI: Do not Use IORESOURCE_STARTALIGN to identify bridge resources
Date: Mon, 20 Jun 2016 20:50:45 -0500 [thread overview]
Message-ID: <20160621015045.GB30307@localhost> (raw)
In-Reply-To: <1464846411-16895-3-git-send-email-xyjxie@linux.vnet.ibm.com>
On Thu, Jun 02, 2016 at 01:46:49PM +0800, Yongji Xie wrote:
> Now we use the IORESOURCE_STARTALIGN to identify bridge resources
> in __assign_resources_sorted(). That's quite fragile. We can't
> make sure that the PCI devices' resources will not use
> IORESOURCE_STARTALIGN any more.
Can you explain this a little more? I don't quite understand the
problem. Maybe you can give an example of the problem?
> In this patch, we try to use a more robust way to identify
> bridge resources.
>
> Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com>
> ---
> drivers/pci/setup-bus.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
> index 55641a3..216ddbc 100644
> --- a/drivers/pci/setup-bus.c
> +++ b/drivers/pci/setup-bus.c
> @@ -390,6 +390,7 @@ static void __assign_resources_sorted(struct list_head *head,
> struct pci_dev_resource *dev_res, *tmp_res, *dev_res2;
> unsigned long fail_type;
> resource_size_t add_align, align;
> + int index;
>
> /* Check if optional add_size is there */
> if (!realloc_head || list_empty(realloc_head))
> @@ -410,11 +411,13 @@ static void __assign_resources_sorted(struct list_head *head,
>
> /*
> * There are two kinds of additional resources in the list:
> - * 1. bridge resource -- IORESOURCE_STARTALIGN
> - * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
> + * 1. bridge resource
> + * 2. SR-IOV resource
> * Here just fix the additional alignment for bridge
> */
> - if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
> + index = dev_res->res - dev_res->dev->resource;
> + if (index < PCI_BRIDGE_RESOURCES ||
> + index > PCI_BRIDGE_RESOURCE_END)
I think the code looks OK; at least, it seems to match the comment.
I'd just like to understand the problem a little better.
> continue;
>
> add_align = get_res_add_align(realloc_head, dev_res->res);
> --
> 1.7.9.5
>
next prev parent reply other threads:[~2016-06-21 1:50 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-02 5:46 [RESEND PATCH v2 0/4] PCI: Add support for enforcing all MMIO BARs not to share PAGE_SIZE Yongji Xie
2016-06-02 5:46 ` [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set Yongji Xie
2016-06-21 1:43 ` [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set\\ Bjorn Helgaas
2016-06-21 2:16 ` Yongji Xie
2016-06-21 8:38 ` Yongji Xie
2016-06-02 5:46 ` [RESEND PATCH v2 2/4] PCI: Do not Use IORESOURCE_STARTALIGN to identify bridge resources Yongji Xie
2016-06-21 1:50 ` Bjorn Helgaas [this message]
2016-06-21 2:59 ` Yongji Xie
2016-06-02 5:46 ` [RESEND PATCH v2 3/4] PCI: Add a new option for resource_alignment to reassign alignment Yongji Xie
2016-06-21 1:57 ` Bjorn Helgaas
2016-06-21 3:26 ` Yongji Xie
2016-06-02 5:46 ` [RESEND PATCH v2 4/4] PCI: Add support for enforcing all MMIO BARs to be page aligned Yongji Xie
2016-06-21 2:26 ` Bjorn Helgaas
2016-06-21 6:46 ` Yongji Xie
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