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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
	Gautham R Shenoy <ego@linux.vnet.ibm.com>,
	Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Subject: [PATCH 7/8] powerpc/64s: idle do not hold reservation longer than required
Date: Tue, 14 Mar 2017 19:23:48 +1000	[thread overview]
Message-ID: <20170314092349.10981-8-npiggin@gmail.com> (raw)
In-Reply-To: <20170314092349.10981-1-npiggin@gmail.com>

When taking the core idle state lock, grab it immediately like a
regular lock, rather than adding more tests in there. Holding the lock
keeps it stable, so there is no need to do it whole holding the
reservation.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/kernel/idle_book3s.S | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index 1c91dc35c559..3cb75907c5c5 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -488,12 +488,12 @@ BEGIN_FTR_SECTION
 	CHECK_HMI_INTERRUPT
 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
 
-	lbz	r7,PACA_THREAD_MASK(r13)
 	ld	r14,PACA_CORE_IDLE_STATE_PTR(r13)
-lwarx_loop2:
-	lwarx	r15,0,r14
-	andis.	r9,r15,PNV_CORE_IDLE_LOCK_BIT@h
+	lbz	r7,PACA_THREAD_MASK(r13)
+
 	/*
+	 * Take the core lock to synchronize against other threads.
+	 *
 	 * Lock bit is set in one of the 2 cases-
 	 * a. In the sleep/winkle enter path, the last thread is executing
 	 * fastsleep workaround code.
@@ -501,7 +501,14 @@ lwarx_loop2:
 	 * workaround undo code or resyncing timebase or restoring context
 	 * In either case loop until the lock bit is cleared.
 	 */
+1:
+	lwarx	r15,0,r14
+	andis.	r9,r15,PNV_CORE_IDLE_LOCK_BIT@h
 	bnel-	core_idle_lock_held
+	oris	r15,r15,PNV_CORE_IDLE_LOCK_BIT@h
+	stwcx.	r15,0,r14
+	bne-	1b
+	isync
 
 	andi.	r9,r15,PNV_CORE_IDLE_THREAD_BITS
 	cmpwi	cr2,r9,0
@@ -513,11 +520,6 @@ lwarx_loop2:
 	 * cr4 - gt or eq if waking up from complete hypervisor state loss.
 	 */
 
-	oris	r15,r15,PNV_CORE_IDLE_LOCK_BIT@h
-	stwcx.	r15,0,r14
-	bne-	lwarx_loop2
-	isync
-
 BEGIN_FTR_SECTION
 	lbz	r4,PACA_SUBCORE_SIBLING_MASK(r13)
 	and	r4,r4,r15
-- 
2.11.0

  parent reply	other threads:[~2017-03-14  9:24 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-14  9:23 [PATCH 0/8] idle fixes and changes for POWER8 and POWER9 Nicholas Piggin
2017-03-14  9:23 ` [PATCH 1/8] powerpc/64s: move remaining system reset idle code into idle_book3s.S Nicholas Piggin
2017-03-14  9:23 ` [PATCH 2/8] powerpc/64s: stop using bit in HSPRG0 to test winkle Nicholas Piggin
2017-03-16 11:14   ` Gautham R Shenoy
2017-03-14  9:23 ` [PATCH 3/8] powerpc/64s: use alternative feature patching Nicholas Piggin
2017-03-16 11:21   ` Gautham R Shenoy
2017-03-14  9:23 ` [PATCH 4/8] powerpc/64s: fix POWER9 machine check handler from stop state Nicholas Piggin
2017-03-16 12:40   ` Mahesh Jagannath Salgaonkar
2017-03-16 13:05     ` Nicholas Piggin
2017-03-16 13:19       ` Gautham R Shenoy
2017-03-20  5:22         ` Mahesh Jagannath Salgaonkar
2017-03-17  2:49     ` Nicholas Piggin
2017-03-17  5:15       ` Nicholas Piggin
2017-03-14  9:23 ` [PATCH 5/8] powerpc/64s: use PACA_THREAD_IDLE_STATE only in POWER8 Nicholas Piggin
2017-03-16 11:54   ` Gautham R Shenoy
2017-03-16 12:16     ` Nicholas Piggin
2017-03-14  9:23 ` [PATCH 6/8] powerpc/64s: idle expand usable core idle state bits Nicholas Piggin
2017-03-16 12:10   ` Gautham R Shenoy
2017-03-14  9:23 ` Nicholas Piggin [this message]
2017-03-16 12:43   ` [PATCH 7/8] powerpc/64s: idle do not hold reservation longer than required Gautham R Shenoy
2017-03-16 12:55     ` Nicholas Piggin
2017-03-14  9:23 ` [PATCH 8/8] powerpc/64s: idle POWER8 avoid full state loss recovery when possible Nicholas Piggin
2017-03-16 16:12   ` Gautham R Shenoy
2017-03-17  5:24     ` Nicholas Piggin

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