From: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
To: linuxppc-dev@lists.ozlabs.org,
Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>,
Andrew Donnellan <andrew.donnellan@au1.ibm.com>,
Christophe Lombard <christophe_lombard@fr.ibm.com>,
Philippe Bergheaud <philippe.bergheaud@fr.ibm.com>,
"Alastair D'Silva" <alastair@au1.ibm.com>
Subject: [PATCH] cxl: Set the valid bit in PE for dedicated mode
Date: Mon, 28 Aug 2017 09:45:22 +0530 [thread overview]
Message-ID: <20170828041522.32188-1-vaibhav@linux.vnet.ibm.com> (raw)
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.
Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
---
drivers/misc/cxl/native.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..0e748c682ee9 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,10 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
+ ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+ /* Make sure the changes to the PE are visible to the card */
+ smp_wmb();
+
result = cxl_ops->afu_reset(afu);
if (result)
return result;
--
2.13.5
next reply other threads:[~2017-08-28 4:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-28 4:15 Vaibhav Jain [this message]
2017-08-28 4:25 ` [PATCH] cxl: Set the valid bit in PE for dedicated mode Andrew Donnellan
2017-08-28 8:58 ` christophe lombard
2017-08-28 9:42 ` Frederic Barrat
2017-08-29 6:53 ` Michael Ellerman
2017-08-30 12:04 ` Vaibhav Jain
2017-08-30 12:28 ` Michael Ellerman
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