From: Paul Mackerras <paulus@ozlabs.org>
To: linuxppc-dev@ozlabs.org
Cc: Christian Zigotzky <chzigotzky@xenosoft.de>,
Michal Sojka <sojkam1@fel.cvut.cz>
Subject: [PATCH] powerpc: Fix handling of alignment interrupt on dcbz instruction
Date: Wed, 13 Sep 2017 14:51:24 +1000 [thread overview]
Message-ID: <20170913045124.GA5071@fergus.ozlabs.ibm.com> (raw)
This fixes the emulation of the dcbz instruction in the alignment
interrupt handler. The error was that we were comparing just the
instruction type field of op.type rather than the whole thing,
and therefore the comparison "type != CACHEOP + DCBZ" was always
true.
Fixes: 31bfdb036f12 ("powerpc: Use instruction emulation infrastructure to handle alignment faults")
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
---
arch/powerpc/kernel/align.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 26b9994d27ee..43ef25156480 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -341,7 +341,7 @@ int fix_alignment(struct pt_regs *regs)
type = op.type & INSTR_TYPE_MASK;
if (!OP_IS_LOAD_STORE(type)) {
- if (type != CACHEOP + DCBZ)
+ if (op.type != CACHEOP + DCBZ)
return -EINVAL;
PPC_WARN_ALIGNMENT(dcbz, regs);
r = emulate_dcbz(op.ea, regs);
--
2.11.0
next reply other threads:[~2017-09-13 4:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-13 4:51 Paul Mackerras [this message]
2017-09-13 6:53 ` [PATCH] powerpc: Fix handling of alignment interrupt on dcbz instruction Michael Ellerman
2017-09-13 7:15 ` Michal Sojka
2017-09-13 14:23 ` Christian Zigotzky
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