From: Rob Herring <robh@kernel.org>
To: Xiaowei Bao <xiaowei.bao@nxp.com>
Cc: mark.rutland@arm.com, kstewart@linuxfoundation.org,
linux-pci@vger.kernel.org, shawn.lin@rock-chips.com,
minghuan.Lian@nxp.com, lorenzo.pieralisi@arm.com, kishon@ti.com,
mingkai.hu@nxp.com, niklas.cassel@axis.com,
devicetree@vger.kernel.org, arnd@arndb.de,
linuxppc-dev@lists.ozlabs.org, robh+dt@kernel.org,
cyrille.pitchen@free-electrons.com, bhelgaas@google.com,
linux-arm-kernel@lists.infradead.org, roy.zang@nxp.com,
Xiaowei Bao <xiaowei.bao@nxp.com>,
gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org,
leoyang.li@nxp.com, pombredanne@nexb.com, shawnguo@kernel.org
Subject: Re: [PATCHv3 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode
Date: Mon, 10 Dec 2018 16:27:19 -0600 [thread overview]
Message-ID: <20181210222719.GA6506@bogus> (raw)
In-Reply-To: <20181203103505.46885-1-xiaowei.bao@nxp.com>
On Mon, 3 Dec 2018 18:35:02 +0800, Xiaowei Bao wrote:
> Add the documentation for the Device Tree binding for the layerscape PCIe
> controller with EP mode.
>
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> ---
> v2:
> - Add the SoC specific compatibles.
> v3:
> - modify the commit message.
>
> .../devicetree/bindings/pci/layerscape-pci.txt | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
prev parent reply other threads:[~2018-12-10 22:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 10:35 [PATCHv3 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode Xiaowei Bao
2018-12-03 10:35 ` [PATCHv3 2/4] arm64: dts: Add the PCIE EP node in dts Xiaowei Bao
2018-12-03 10:35 ` [PATCHv3 3/4] pci: layerscape: Add the EP mode support Xiaowei Bao
2018-12-03 10:35 ` [PATCHv3 4/4] misc: pci_endpoint_test: Add the layerscape EP device support Xiaowei Bao
2018-12-19 9:21 ` Greg KH
2018-12-19 9:30 ` Xiaowei Bao
2018-12-10 22:27 ` Rob Herring [this message]
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