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Mon, 15 Apr 2019 03:10:49 -0700 (PDT) Received: from localhost.localdomain ([2001:470:9e39::64]) by smtp.gmail.com with ESMTPSA id d6sm11592214wrp.9.2019.04.15.03.10.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 15 Apr 2019 03:10:49 -0700 (PDT) From: Jonas Gorski To: linux-clk@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-tegra@vger.kernel.org Subject: [PATCH RFT V2 0/8] clk: make register endianness a run-time property Date: Mon, 15 Apr 2019 12:10:38 +0200 Message-Id: <20190415101046.5872-1-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.13.2 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter De Schrijver , Fabio Estevam , Heiko Stuebner , Stephen Boyd , Michael Turquette , Michal Simek , Jonathan Hunter , Prashant Gaikwad , Paul Mackerras , NXP Linux Team , Pengutronix Kernel Team , Thierry Reding , Anatolij Gustschin , Shawn Guo , Sascha Hauer Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Currently the endianness for register accesses of basic clocks if fixed based on the architecture (BE for PowerPC, LE for everyone else). This is inconvenient for architectures that support both. To avoid adding more rules to the #ifdef, this patchset adds new flags to the basic clocks to tag the registers as BE then converts the only big endian machine PowerPC to use it. While not used by PowerPC, also add big endian support to clk-fractional- divider and clk-multiplier, to cover all basic clocks. Technically clk-multiplier isn't one as it doesn't provide any registration functions and none of its users set the basic clock flag, but nevertheless it and its flags are defined clk-provider.h. So I think it's close enough to a basic clock to still count. That way we can drop the special casing for PowerPC, and allow other big endian platforms/drivers to make use of the basic clocks. In addition, we can now drop clk_readl and clk_writel, and replace them with normal readl and writel accessors everywhere. Still RFT because I don't have a PowerPC device to test, and especially not a 512x one. I did compile test it though! I looked really hard, and this is the only place I could find where a PowerPC platform (indirectly) used the clk accessors. None of the regular drivers in clk/ were selected in any of the powerpc defconfigs, and this was the only platform code that registered basic clocks. Changelog: V1 -> V2: * switch from global flag to per-clock flag * also added fractional divider and multiplier clocks, to make all basic or quasi basic clocks support big endian * reordered the basic clock patches in alphabetical order * drop clk_{readl,writel} instead of adding BE variants and use common accessors directly * dropped the RFC, as I got comments (yay). More always welcome of course :-) Jonas Gorski (8): clk: divider: add explicit big endian support clk: fractional-divider: add explicit big endian support clk: gate: add explicit big endian support clk: multiplier: add explicit big endian support clk: mux: add explicit big endian support powerpc/512x: mark clocks as big endian clk: core: remove powerpc special handling clk: core: replace clk_{readl,writel} with {readl,writel} arch/powerpc/platforms/512x/clock-commonclk.c | 11 +++--- drivers/clk/clk-divider.c | 26 +++++++++++--- drivers/clk/clk-fractional-divider.c | 22 ++++++++++-- drivers/clk/clk-gate.c | 22 ++++++++++-- drivers/clk/clk-multiplier.c | 22 ++++++++++-- drivers/clk/clk-mux.c | 22 ++++++++++-- drivers/clk/clk-xgene.c | 6 ++-- drivers/clk/hisilicon/clk-hisi-phase.c | 4 +-- drivers/clk/imx/clk-divider-gate.c | 20 +++++------ drivers/clk/imx/clk-sccg-pll.c | 12 +++---- drivers/clk/nxp/clk-lpc18xx-ccu.c | 6 ++-- drivers/clk/nxp/clk-lpc18xx-cgu.c | 24 ++++++------- drivers/clk/rockchip/clk-ddr.c | 2 +- drivers/clk/rockchip/clk-half-divider.c | 6 ++-- drivers/clk/tegra/clk-tegra124.c | 4 +-- drivers/clk/tegra/clk-tegra210.c | 6 ++-- drivers/clk/zynq/clkc.c | 6 ++-- drivers/clk/zynq/pll.c | 18 +++++----- include/linux/clk-provider.h | 51 +++++++++++---------------- 19 files changed, 182 insertions(+), 108 deletions(-) -- 2.13.2