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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v2 04/52] powerpc/64s/exception: move and tidy EXCEPTION_PROLOG_2 variants
Date: Thu, 20 Jun 2019 15:14:11 +1000	[thread overview]
Message-ID: <20190620051459.29573-5-npiggin@gmail.com> (raw)
In-Reply-To: <20190620051459.29573-1-npiggin@gmail.com>

- Re-name the macros to _REAL and _VIRT suffixes rather than no and
  _RELON suffix.

- Move the macro definitions together in the file.

- Move RELOCATABLE ifdef inside the _VIRT macro.

Further consolidation between variants does not buy much here.

No generated code change.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/include/asm/exception-64s.h | 87 ++++++++++++------------
 arch/powerpc/kernel/exceptions-64s.S     | 18 ++---
 2 files changed, 51 insertions(+), 54 deletions(-)

diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 94c4992188a7..4aef70defcdd 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -170,8 +170,33 @@
 	ori	reg,reg,(ABS_ADDR(label))@l;				\
 	addis	reg,reg,(ABS_ADDR(label))@h
 
+.macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri
+	ld	r10,PACAKMSR(r13)	/* get MSR value for kernel */
+	.if ! \set_ri
+	xori	r10,r10,MSR_RI		/* Clear MSR_RI */
+	.endif
+	.if \hsrr
+	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
+	.else
+	mfspr	r11,SPRN_SRR0		/* save SRR0 */
+	.endif
+	LOAD_HANDLER(r12, \label\())
+	.if \hsrr
+	mtspr	SPRN_HSRR0,r12
+	mfspr	r12,SPRN_HSRR1		/* and HSRR1 */
+	mtspr	SPRN_HSRR1,r10
+	HRFI_TO_KERNEL
+	.else
+	mtspr	SPRN_SRR0,r12
+	mfspr	r12,SPRN_SRR1		/* and SRR1 */
+	mtspr	SPRN_SRR1,r10
+	RFI_TO_KERNEL
+	.endif
+	b	.	/* prevent speculative execution */
+.endm
+
+.macro EXCEPTION_PROLOG_2_VIRT label, hsrr
 #ifdef CONFIG_RELOCATABLE
-.macro EXCEPTION_PROLOG_2_RELON label, hsrr
 	.if \hsrr
 	mfspr	r11,SPRN_HSRR0	/* save HSRR0 */
 	.else
@@ -187,10 +212,7 @@
 	li	r10,MSR_RI
 	mtmsrd 	r10,1		/* Set RI (EE=0) */
 	bctr
-.endm
 #else
-/* If not relocatable, we can jump directly -- and save messing with LR */
-.macro EXCEPTION_PROLOG_2_RELON label, hsrr
 	.if \hsrr
 	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
 	mfspr	r12,SPRN_HSRR1		/* and HSRR1 */
@@ -201,19 +223,19 @@
 	li	r10,MSR_RI
 	mtmsrd 	r10,1			/* Set RI (EE=0) */
 	b	\label
-.endm
 #endif
+.endm
 
 /*
  * As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
- * rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case
- * EXCEPTION_PROLOG_2_RELON will be using LR.
+ * rfid. Save CTR in case we're CONFIG_RELOCATABLE, in which case
+ * EXCEPTION_PROLOG_2_VIRT will be using CTR.
  */
 #define EXCEPTION_RELON_PROLOG(area, label, hsrr, extra, vec)		\
 	SET_SCRATCH0(r13);		/* save r13 */			\
 	EXCEPTION_PROLOG_0(area);					\
 	EXCEPTION_PROLOG_1(area, extra, vec);				\
-	EXCEPTION_PROLOG_2_RELON label, hsrr
+	EXCEPTION_PROLOG_2_VIRT label, hsrr
 
 /* Exception register prefixes */
 #define EXC_HV		1
@@ -319,36 +341,11 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 #define EXCEPTION_PROLOG_1(area, extra, vec)				\
 	_EXCEPTION_PROLOG_1(area, extra, vec)
 
-.macro EXCEPTION_PROLOG_2 label, hsrr, set_ri
-	ld	r10,PACAKMSR(r13)	/* get MSR value for kernel */
-	.if ! \set_ri
-	xori	r10,r10,MSR_RI		/* Clear MSR_RI */
-	.endif
-	.if \hsrr
-	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
-	.else
-	mfspr	r11,SPRN_SRR0		/* save SRR0 */
-	.endif
-	LOAD_HANDLER(r12,\label\())
-	.if \hsrr
-	mtspr	SPRN_HSRR0,r12
-	mfspr	r12,SPRN_HSRR1		/* and HSRR1 */
-	mtspr	SPRN_HSRR1,r10
-	HRFI_TO_KERNEL
-	.else
-	mtspr	SPRN_SRR0,r12
-	mfspr	r12,SPRN_SRR1		/* and SRR1 */
-	mtspr	SPRN_SRR1,r10
-	RFI_TO_KERNEL
-	.endif
-	b	.	/* prevent speculative execution */
-.endm
-
 #define EXCEPTION_PROLOG(area, label, h, extra, vec)			\
 	SET_SCRATCH0(r13);		/* save r13 */			\
 	EXCEPTION_PROLOG_0(area);					\
 	EXCEPTION_PROLOG_1(area, extra, vec);				\
-	EXCEPTION_PROLOG_2 label, h, 1
+	EXCEPTION_PROLOG_2_REAL label, h, 1
 
 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 /*
@@ -417,7 +414,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 #define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec)		\
 	EXCEPTION_PROLOG_0(area);					\
 	EXCEPTION_PROLOG_1(area, extra, vec);				\
-	EXCEPTION_PROLOG_2 label, h, 0
+	EXCEPTION_PROLOG_2_REAL label, h, 0
 
 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
 .macro KVMTEST hsrr, n
@@ -574,14 +571,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 
 #define STD_EXCEPTION_OOL(vec, label)				\
 	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec);	\
-	EXCEPTION_PROLOG_2 label, EXC_STD, 1
+	EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
 
 #define STD_EXCEPTION_HV(loc, vec, label)			\
 	EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
 
 #define STD_EXCEPTION_HV_OOL(vec, label)			\
 	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);	\
-	EXCEPTION_PROLOG_2 label, EXC_HV, 1
+	EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
 
 #define STD_RELON_EXCEPTION(loc, vec, label)		\
 	/* No guest interrupts come through here */	\
@@ -589,14 +586,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 
 #define STD_RELON_EXCEPTION_OOL(vec, label)			\
 	EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec);		\
-	EXCEPTION_PROLOG_2_RELON label, EXC_STD
+	EXCEPTION_PROLOG_2_VIRT label, EXC_STD
 
 #define STD_RELON_EXCEPTION_HV(loc, vec, label)		\
 	EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
 
 #define STD_RELON_EXCEPTION_HV_OOL(vec, label)			\
 	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);	\
-	EXCEPTION_PROLOG_2_RELON label, EXC_HV
+	EXCEPTION_PROLOG_2_VIRT label, EXC_HV
 
 .macro SOFTEN_TEST hsrr, vec, bitmask
 	lbz	r10, PACAIRQSOFTMASK(r13)
@@ -645,41 +642,41 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 	SET_SCRATCH0(r13);    /* save r13 */				\
 	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
 	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);	\
-	EXCEPTION_PROLOG_2 label, h, 1
+	EXCEPTION_PROLOG_2_REAL label, h, 1
 
 #define MASKABLE_EXCEPTION(vec, label, bitmask)				\
 	__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)
 
 #define MASKABLE_EXCEPTION_OOL(vec, label, bitmask)			\
 	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
-	EXCEPTION_PROLOG_2 label, EXC_STD, 1
+	EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
 
 #define MASKABLE_EXCEPTION_HV(vec, label, bitmask)			\
 	__MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
 
 #define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask)			\
 	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
-	EXCEPTION_PROLOG_2 label, EXC_HV, 1
+	EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
 
 #define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask)	\
 	SET_SCRATCH0(r13);    /* save r13 */				\
 	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
 	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);	\
-	EXCEPTION_PROLOG_2_RELON label, h
+	EXCEPTION_PROLOG_2_VIRT label, h
 
 #define MASKABLE_RELON_EXCEPTION(vec, label, bitmask)			\
 	__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask)
 
 #define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask)		\
 	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
-	EXCEPTION_PROLOG_2 label, EXC_STD, 1
+	EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
 
 #define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask)		\
 	__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
 
 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask)		\
 	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
-	EXCEPTION_PROLOG_2_RELON label, EXC_HV
+	EXCEPTION_PROLOG_2_VIRT label, EXC_HV
 
 /*
  * Our exception common code can be passed various "additions"
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 75becb248d61..bb286f7e1aee 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -356,7 +356,7 @@ machine_check_pSeries_0:
 	 * nested machine check corrupts it. machine_check_common enables
 	 * MSR_RI.
 	 */
-	EXCEPTION_PROLOG_2 machine_check_common, EXC_STD, 0
+	EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0
 
 TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
 
@@ -598,7 +598,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x300)
 	mfspr	r11,SPRN_DSISR
 	std	r10,PACA_EXGEN+EX_DAR(r13)
 	stw	r11,PACA_EXGEN+EX_DSISR(r13)
-EXCEPTION_PROLOG_2 data_access_common, EXC_STD, 1
+EXCEPTION_PROLOG_2_REAL data_access_common, EXC_STD, 1
 
 EXC_VIRT_BEGIN(data_access, 0x4300, 0x80)
 SET_SCRATCH0(r13)		/* save r13 */
@@ -608,7 +608,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x300)
 	mfspr	r11,SPRN_DSISR
 	std	r10,PACA_EXGEN+EX_DAR(r13)
 	stw	r11,PACA_EXGEN+EX_DSISR(r13)
-EXCEPTION_PROLOG_2_RELON data_access_common, EXC_STD
+EXCEPTION_PROLOG_2_VIRT data_access_common, EXC_STD
 EXC_VIRT_END(data_access, 0x4300, 0x80)
 
 TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
@@ -645,7 +645,7 @@ TRAMP_REAL_BEGIN(tramp_real_data_access_slb)
 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
 	mfspr	r10,SPRN_DAR
 	std	r10,PACA_EXSLB+EX_DAR(r13)
-EXCEPTION_PROLOG_2 data_access_slb_common, EXC_STD, 1
+EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1
 
 EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
 SET_SCRATCH0(r13)		/* save r13 */
@@ -653,7 +653,7 @@ EXCEPTION_PROLOG_0(PACA_EXSLB)
 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
 	mfspr	r10,SPRN_DAR
 	std	r10,PACA_EXSLB+EX_DAR(r13)
-EXCEPTION_PROLOG_2_RELON data_access_slb_common, EXC_STD
+EXCEPTION_PROLOG_2_VIRT data_access_slb_common, EXC_STD
 EXC_VIRT_END(data_access_slb, 0x4380, 0x80)
 
 TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
@@ -774,7 +774,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x600)
 	mfspr	r11,SPRN_DSISR
 	std	r10,PACA_EXGEN+EX_DAR(r13)
 	stw	r11,PACA_EXGEN+EX_DSISR(r13)
-EXCEPTION_PROLOG_2 alignment_common, EXC_STD, 1
+EXCEPTION_PROLOG_2_REAL alignment_common, EXC_STD, 1
 EXC_REAL_END(alignment, 0x600, 0x100)
 
 EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
@@ -785,7 +785,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x600)
 	mfspr	r11,SPRN_DSISR
 	std	r10,PACA_EXGEN+EX_DAR(r13)
 	stw	r11,PACA_EXGEN+EX_DSISR(r13)
-EXCEPTION_PROLOG_2_RELON alignment_common, EXC_STD
+EXCEPTION_PROLOG_2_VIRT alignment_common, EXC_STD
 EXC_VIRT_END(alignment, 0x4600, 0x100)
 
 TRAMP_KVM(PACA_EXGEN, 0x600)
@@ -1320,7 +1320,7 @@ EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100)
 #endif
 
 	KVMTEST_HV(0x1500)
-	EXCEPTION_PROLOG_2 denorm_common, EXC_HV, 1
+	EXCEPTION_PROLOG_2_REAL denorm_common, EXC_HV, 1
 EXC_REAL_END(denorm_exception_hv, 0x1500, 0x100)
 
 #ifdef CONFIG_PPC_DENORMALISATION
@@ -1442,7 +1442,7 @@ EXC_VIRT_NONE(0x5800, 0x100)
 	std	r12,PACA_EXGEN+EX_R12(r13);		\
 	GET_SCRATCH0(r10);				\
 	std	r10,PACA_EXGEN+EX_R13(r13);		\
-	EXCEPTION_PROLOG_2 soft_nmi_common, _H, 1
+	EXCEPTION_PROLOG_2_REAL soft_nmi_common, _H, 1
 
 /*
  * Branch to soft_nmi_interrupt using the emergency stack. The emergency
-- 
2.20.1


  parent reply	other threads:[~2019-06-20  5:25 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-20  5:14 [PATCH v2 00/52] powerpc/64s interrupt handler cleanups, gasification Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 01/52] powerpc/64s/exception: fix line wrap and semicolon inconsistencies in macros Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 02/52] powerpc/64s/exception: remove H concatenation for EXC_HV variants Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 03/52] powerpc/64s/exception: consolidate EXCEPTION_PROLOG_2 with _NORI variant Nicholas Piggin
2019-06-20  5:14 ` Nicholas Piggin [this message]
2019-06-20  5:14 ` [PATCH v2 05/52] powerpc/64s/exception: fix sreset KVM test code Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 06/52] powerpc/64s/exception: remove the "extra" macro parameter Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 07/52] powerpc/64s/exception: consolidate maskable and non-maskable prologs Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 08/52] powerpc/64s/exception: merge KVM handler and skip variants Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 09/52] powerpc/64s/exception: KVM handler can set the HSRR trap bit Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 10/52] powerpc/64s/exception: Make EXCEPTION_PROLOG_0 a gas macro for consistency with others Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 11/52] powerpc/64s/exception: Move EXCEPTION_COMMON handler and return branches into callers Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 12/52] powerpc/64s/exception: Move EXCEPTION_COMMON additions " Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 13/52] powerpc/64s/exception: unwind exception-64s.h macros Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 14/52] powerpc/64s/exception: improve 0x500 handler code Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 15/52] powerpc/64s/exception: move EXCEPTION_PROLOG_2* to a more logical place Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 16/52] powerpc/64s/exception: remove STD_EXCEPTION_COMMON variants Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 17/52] powerpc/64s/exception: move KVM related code together Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 18/52] powerpc/64s/exception: move exception-64s.h code to exception-64s.S where it is used Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 19/52] powerpc/64s/exception: move head-64.h " Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 20/52] powerpc/64s/exception: remove __BRANCH_TO_KVM Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 21/52] powerpc/64s/exception: remove unused BRANCH_TO_COMMON Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 22/52] powerpc/64s/exception: use a gas macro for system call handler code Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 23/52] powerpc/64s/exception: fix indenting irregularities Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 24/52] powerpc/64s/exception: generate regs clear instructions using .rept Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 25/52] powerpc/64s/exception: remove bad stack branch Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 26/52] powerpc/64s/exception: remove pointless EXCEPTION_PROLOG macro indirection Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 27/52] powerpc/64s/exception: move paca save area offsets into exception-64s.S Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 28/52] powerpc/64s/exception: clean up system call entry Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 29/52] powerpc/64s/exception: avoid SPR RAW scoreboard stall in real mode entry Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 30/52] powerpc/64s/exception: optimise system_reset for idle, clean up non-idle case Nicholas Piggin
2019-06-20  5:41   ` Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 31/52] powerpc/64s/exception: mtmsrd L=1 cleanup Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 32/52] powerpc/64s/exception: windup use r9 consistently to restore SPRs Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 33/52] powerpc/64s/exception: move machine check windup in_mce handling Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 34/52] powerpc/64s/exception: simplify hmi windup code Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 35/52] powerpc/64s/exception: shuffle windup code around Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 36/52] powerpc/64s/exception: use common macro for windup Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 37/52] powerpc/64s/exception: add dar and dsisr options to exception macro Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 38/52] powerpc/64s/exception: machine check use standard macros to save dar/dsisr Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 39/52] powerpc/64s/exception: denorm handler use standard scratch save macro Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 40/52] powerpc/64s/exception: move SET_SCRATCH0 into EXCEPTION_PROLOG_0 Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 41/52] powerpc/tm: update comment about interrupt re-entrancy Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 42/52] powerpc/64s/exception: machine check fwnmi does not trigger when in HV mode Nicholas Piggin
2019-06-20  9:26   ` Mahesh Jagannath Salgaonkar
2019-06-20  9:50     ` Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 43/52] powerpc/64s/exception: machine check early only runs " Nicholas Piggin
2019-06-20  9:53   ` Mahesh J Salgaonkar
2019-06-20 10:16     ` Nicholas Piggin
2019-06-20 10:57       ` Mahesh Jagannath Salgaonkar
2019-06-20  5:14 ` [PATCH v2 44/52] powerpc/64s/exception: separate pseries and powernv mce delivery paths Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 45/52] powerpc/64s/exception: machine check windup restore cfar for host delivery Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 46/52] powerpc/64s/exception: fix machine check early should not set AMR Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 47/52] powerpc/64s/exception: machine check restructure handler to be more regular Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 48/52] powerpc/64s/exception: simplify machine check early path Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 49/52] powerpc/64s/exceptions: machine check move unrecoverable handling out of line Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 50/52] powerpc/64s/exception: untangle early machine check handler Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 51/52] powerpc/64s/exception: machine check improve branch labels Nicholas Piggin
2019-06-20  5:14 ` [PATCH v2 52/52] powerpc/64s/exception: add missing branch to self after RFI Nicholas Piggin

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