Re: [PATCH v2] powerpc: slightly improve cache helpers

From: Segher Boessenkool <segher@kernel.crashing.org>
To: Nick Desaulniers <ndesaulniers@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	clang-built-linux <clang-built-linux@googlegroups.com>,
	Paul Mackerras <paulus@samba.org>,
	Nathan Chancellor <natechancellor@gmail.com>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v2] powerpc: slightly improve cache helpers
Date: Mon, 22 Jul 2019 12:58:17 -0500	[thread overview]
Message-ID: <20190722175817.GE20882@gate.crashing.org> (raw)
In-Reply-To: <CAKwvOd=KRVsFkT8dLFoitky9OF8tKmbn00-OPi6kBygyx4QwHg@mail.gmail.com>

On Mon, Jul 22, 2019 at 10:21:07AM -0700, Nick Desaulniers wrote:
> On Sun, Jul 21, 2019 at 11:19 PM Segher Boessenkool
> <segher@kernel.crashing.org> wrote:
> > On Sun, Jul 21, 2019 at 07:41:40PM -0700, Nathan Chancellor wrote:
> > > On Sun, Jul 21, 2019 at 01:01:50PM -0500, Segher Boessenkool wrote:
> > > > On Sun, Jul 21, 2019 at 12:58:46AM -0700, Nathan Chancellor wrote:
> > > > > 0000017c clear_user_page:
> > > > >      17c: 94 21 ff f0                     stwu 1, -16(1)
> > > > >      180: 38 80 00 80                     li 4, 128
> > > > >      184: 38 63 ff e0                     addi 3, 3, -32
> > > > >      188: 7c 89 03 a6                     mtctr 4
> > > > >      18c: 38 81 00 0f                     addi 4, 1, 15
> > > > >      190: 8c c3 00 20                     lbzu 6, 32(3)
> > > > >      194: 98 c1 00 0f                     stb 6, 15(1)
> > > > >      198: 7c 00 27 ec                     dcbz 0, 4
> > > > >      19c: 42 00 ff f4                     bdnz .+65524
> > > >
> > > > Uh, yeah, well, I have no idea what clang tried here, but that won't
> > > > work.  It's copying a byte from each target cache line to the stack,
> > > > and then does clears the cache line containing that byte on the stack.
> > > >
> > > > I *guess* this is about "Z" and not about "%y", but you'll have to ask
> > > > the clang people.
> > > >
> > > > Or it may be that they do not treat inline asm operands as lvalues
> > > > properly?  That rings some bells.  Yeah that looks like it.
> >
> > The code is
> >   __asm__ __volatile__ ("dcbz %y0" : : "Z"(*(u8 *)addr) : "memory");
> >
> > so yeah it looks like clang took that  *(u8 *)addr  as rvalue, and
> > stored that in stack, and then used *that* as memory.
> 
> What's the %y modifier supposed to mean here?

It prints a memory address for an indexed operand.

If you write just "%0" it prints addresses that are a single register
as "0(r3)" instead of "0,r3".  Some instructions do not allow offset
form.

> addr is in the list of
> inputs, so what's wrong with using it as an rvalue?

It seems to use *(u8 *)addr as rvalue.  Asm operands are lvalues.  It
matters a lot for memory operands.

> > Maybe clang simply does not not to treat "Z" the same as "m"?  (And "Y"
> > and "Q" and "es" and a whole bunch of "w*", what about those?)

Segher