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From: Rasmus Villemoes <linux@rasmusvillemoes.dk>
To: Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
	Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Scott Wood <oss@buserror.net>,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 21/47] soc: fsl: qe: merge qe_ic.h headers into qe_ic.c
Date: Fri,  8 Nov 2019 14:00:57 +0100
Message-ID: <20191108130123.6839-22-linux@rasmusvillemoes.dk> (raw)
In-Reply-To: <20191108130123.6839-1-linux@rasmusvillemoes.dk>

The public qe_ic.h header is no longer included by anything but
qe_ic.c. Merge both headers into qe_ic.c, and drop the unused
constants.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
 drivers/soc/fsl/qe/qe_ic.c | 52 +++++++++++++++++++-
 drivers/soc/fsl/qe/qe_ic.h | 99 --------------------------------------
 include/soc/fsl/qe/qe_ic.h | 56 ---------------------
 3 files changed, 50 insertions(+), 157 deletions(-)
 delete mode 100644 drivers/soc/fsl/qe/qe_ic.h
 delete mode 100644 include/soc/fsl/qe/qe_ic.h

diff --git a/drivers/soc/fsl/qe/qe_ic.c b/drivers/soc/fsl/qe/qe_ic.c
index 4832884da5bb..0dd5bdb04a14 100644
--- a/drivers/soc/fsl/qe/qe_ic.c
+++ b/drivers/soc/fsl/qe/qe_ic.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/errno.h>
+#include <linux/irq.h>
 #include <linux/reboot.h>
 #include <linux/slab.h>
 #include <linux/stddef.h>
@@ -25,9 +26,56 @@
 #include <asm/irq.h>
 #include <asm/io.h>
 #include <soc/fsl/qe/qe.h>
-#include <soc/fsl/qe/qe_ic.h>
 
-#include "qe_ic.h"
+#define NR_QE_IC_INTS		64
+
+/* QE IC registers offset */
+#define QEIC_CICR		0x00
+#define QEIC_CIVEC		0x04
+#define QEIC_CIPXCC		0x10
+#define QEIC_CIPYCC		0x14
+#define QEIC_CIPWCC		0x18
+#define QEIC_CIPZCC		0x1c
+#define QEIC_CIMR		0x20
+#define QEIC_CRIMR		0x24
+#define QEIC_CIPRTA		0x30
+#define QEIC_CIPRTB		0x34
+#define QEIC_CHIVEC		0x60
+
+struct qe_ic {
+	/* Control registers offset */
+	u32 __iomem *regs;
+
+	/* The remapper for this QEIC */
+	struct irq_domain *irqhost;
+
+	/* The "linux" controller struct */
+	struct irq_chip hc_irq;
+
+	/* VIRQ numbers of QE high/low irqs */
+	unsigned int virq_high;
+	unsigned int virq_low;
+};
+
+/*
+ * QE interrupt controller internal structure
+ */
+struct qe_ic_info {
+	/* Location of this source at the QIMR register */
+	u32	mask;
+
+	/* Mask register offset */
+	u32	mask_reg;
+
+	/*
+	 * For grouped interrupts sources - the interrupt code as
+	 * appears at the group priority register
+	 */
+	u8	pri_code;
+
+	/* Group priority register offset */
+	u32	pri_reg;
+};
 
 static DEFINE_RAW_SPINLOCK(qe_ic_lock);
 
diff --git a/drivers/soc/fsl/qe/qe_ic.h b/drivers/soc/fsl/qe/qe_ic.h
deleted file mode 100644
index 9420378d9b6b..000000000000
--- a/drivers/soc/fsl/qe/qe_ic.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * drivers/soc/fsl/qe/qe_ic.h
- *
- * QUICC ENGINE Interrupt Controller Header
- *
- * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: Li Yang <leoli@freescale.com>
- * Based on code from Shlomi Gridish <gridish@freescale.com>
- */
-#ifndef _POWERPC_SYSDEV_QE_IC_H
-#define _POWERPC_SYSDEV_QE_IC_H
-
-#include <soc/fsl/qe/qe_ic.h>
-
-#define NR_QE_IC_INTS		64
-
-/* QE IC registers offset */
-#define QEIC_CICR		0x00
-#define QEIC_CIVEC		0x04
-#define QEIC_CRIPNR		0x08
-#define QEIC_CIPNR		0x0c
-#define QEIC_CIPXCC		0x10
-#define QEIC_CIPYCC		0x14
-#define QEIC_CIPWCC		0x18
-#define QEIC_CIPZCC		0x1c
-#define QEIC_CIMR		0x20
-#define QEIC_CRIMR		0x24
-#define QEIC_CICNR		0x28
-#define QEIC_CIPRTA		0x30
-#define QEIC_CIPRTB		0x34
-#define QEIC_CRICR		0x3c
-#define QEIC_CHIVEC		0x60
-
-/* Interrupt priority registers */
-#define CIPCC_SHIFT_PRI0	29
-#define CIPCC_SHIFT_PRI1	26
-#define CIPCC_SHIFT_PRI2	23
-#define CIPCC_SHIFT_PRI3	20
-#define CIPCC_SHIFT_PRI4	13
-#define CIPCC_SHIFT_PRI5	10
-#define CIPCC_SHIFT_PRI6	7
-#define CIPCC_SHIFT_PRI7	4
-
-/* CICR priority modes */
-#define CICR_GWCC		0x00040000
-#define CICR_GXCC		0x00020000
-#define CICR_GYCC		0x00010000
-#define CICR_GZCC		0x00080000
-#define CICR_GRTA		0x00200000
-#define CICR_GRTB		0x00400000
-#define CICR_HPIT_SHIFT		8
-#define CICR_HPIT_MASK		0x00000300
-#define CICR_HP_SHIFT		24
-#define CICR_HP_MASK		0x3f000000
-
-/* CICNR */
-#define CICNR_WCC1T_SHIFT	20
-#define CICNR_ZCC1T_SHIFT	28
-#define CICNR_YCC1T_SHIFT	12
-#define CICNR_XCC1T_SHIFT	4
-
-/* CRICR */
-#define CRICR_RTA1T_SHIFT	20
-#define CRICR_RTB1T_SHIFT	28
-
-/* Signal indicator */
-#define SIGNAL_MASK		3
-#define SIGNAL_HIGH		2
-#define SIGNAL_LOW		0
-
-struct qe_ic {
-	/* Control registers offset */
-	u32 __iomem *regs;
-
-	/* The remapper for this QEIC */
-	struct irq_domain *irqhost;
-
-	/* The "linux" controller struct */
-	struct irq_chip hc_irq;
-
-	/* VIRQ numbers of QE high/low irqs */
-	unsigned int virq_high;
-	unsigned int virq_low;
-};
-
-/*
- * QE interrupt controller internal structure
- */
-struct qe_ic_info {
-	u32	mask;	  /* location of this source at the QIMR register. */
-	u32	mask_reg; /* Mask register offset */
-	u8	pri_code; /* for grouped interrupts sources - the interrupt
-			     code as appears at the group priority register */
-	u32	pri_reg;  /* Group priority register offset */
-};
-
-#endif /* _POWERPC_SYSDEV_QE_IC_H */
diff --git a/include/soc/fsl/qe/qe_ic.h b/include/soc/fsl/qe/qe_ic.h
deleted file mode 100644
index 70bb5a0f6535..000000000000
--- a/include/soc/fsl/qe/qe_ic.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Authors: 	Shlomi Gridish <gridish@freescale.com>
- * 		Li Yang <leoli@freescale.com>
- *
- * Description:
- * QE IC external definitions and structure.
- */
-#ifndef _ASM_POWERPC_QE_IC_H
-#define _ASM_POWERPC_QE_IC_H
-
-#include <linux/irq.h>
-
-struct device_node;
-struct qe_ic;
-
-#define NUM_OF_QE_IC_GROUPS	6
-
-/* Flags when we init the QE IC */
-#define QE_IC_SPREADMODE_GRP_W			0x00000001
-#define QE_IC_SPREADMODE_GRP_X			0x00000002
-#define QE_IC_SPREADMODE_GRP_Y			0x00000004
-#define QE_IC_SPREADMODE_GRP_Z			0x00000008
-#define QE_IC_SPREADMODE_GRP_RISCA		0x00000010
-#define QE_IC_SPREADMODE_GRP_RISCB		0x00000020
-
-#define QE_IC_LOW_SIGNAL			0x00000100
-#define QE_IC_HIGH_SIGNAL			0x00000200
-
-#define QE_IC_GRP_W_PRI0_DEST_SIGNAL_HIGH	0x00001000
-#define QE_IC_GRP_W_PRI1_DEST_SIGNAL_HIGH	0x00002000
-#define QE_IC_GRP_X_PRI0_DEST_SIGNAL_HIGH	0x00004000
-#define QE_IC_GRP_X_PRI1_DEST_SIGNAL_HIGH	0x00008000
-#define QE_IC_GRP_Y_PRI0_DEST_SIGNAL_HIGH	0x00010000
-#define QE_IC_GRP_Y_PRI1_DEST_SIGNAL_HIGH	0x00020000
-#define QE_IC_GRP_Z_PRI0_DEST_SIGNAL_HIGH	0x00040000
-#define QE_IC_GRP_Z_PRI1_DEST_SIGNAL_HIGH	0x00080000
-#define QE_IC_GRP_RISCA_PRI0_DEST_SIGNAL_HIGH	0x00100000
-#define QE_IC_GRP_RISCA_PRI1_DEST_SIGNAL_HIGH	0x00200000
-#define QE_IC_GRP_RISCB_PRI0_DEST_SIGNAL_HIGH	0x00400000
-#define QE_IC_GRP_RISCB_PRI1_DEST_SIGNAL_HIGH	0x00800000
-#define QE_IC_GRP_W_DEST_SIGNAL_SHIFT		(12)
-
-/* QE interrupt sources groups */
-enum qe_ic_grp_id {
-	QE_IC_GRP_W = 0,	/* QE interrupt controller group W */
-	QE_IC_GRP_X,		/* QE interrupt controller group X */
-	QE_IC_GRP_Y,		/* QE interrupt controller group Y */
-	QE_IC_GRP_Z,		/* QE interrupt controller group Z */
-	QE_IC_GRP_RISCA,	/* QE interrupt controller RISC group A */
-	QE_IC_GRP_RISCB		/* QE interrupt controller RISC group B */
-};
-
-#endif /* _ASM_POWERPC_QE_IC_H */
-- 
2.23.0


  parent reply index

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-08 13:00 [PATCH v4 00/47] QUICC Engine support on ARM and ARM64 Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 01/47] soc: fsl: qe: remove space-before-tab Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 02/47] soc: fsl: qe: drop volatile qualifier of struct qe_ic::regs Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 03/47] soc: fsl: qe: rename qe_(clr/set/clrset)bit* helpers Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read,write}* wrappers Rasmus Villemoes
2019-11-12  5:17   ` [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read, write}* wrappers Timur Tabi
2019-11-12  7:14     ` [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read,write}* wrappers Rasmus Villemoes
2019-11-14  5:08       ` Timur Tabi
2019-11-14  8:55         ` Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 05/47] soc: fsl: qe: avoid ppc-specific io accessors Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 06/47] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 07/47] soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32 Rasmus Villemoes
2019-11-15  4:50   ` Timur Tabi
2019-11-15  8:11     ` Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 08/47] soc: fsl: qe: drop unneeded #includes Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 09/47] soc: fsl: qe: drop assign-only high_active in qe_ic_init Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 10/47] soc: fsl: qe: remove pointless sysfs registration in qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 11/47] soc: fsl: qe: use qe_ic_cascade_{low, high}_mpic also on 83xx Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 12/47] soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/ Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 13/47] powerpc/83xx: remove mpc83xx_ipic_and_qe_init_IRQ Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 14/47] powerpc/85xx: remove mostly pointless mpc85xx_qe_init() Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 15/47] soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 16/47] soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_low Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 17/47] soc: fsl: qe: remove unused qe_ic_set_* functions Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 18/47] soc: fsl: qe: don't use NO_IRQ in qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 19/47] soc: fsl: qe: make qe_ic_get_{low,high}_irq static Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 20/47] soc: fsl: qe: simplify qe_ic_init() Rasmus Villemoes
2019-11-08 13:00 ` Rasmus Villemoes [this message]
2019-11-08 13:00 ` [PATCH v4 22/47] soc: fsl: qe: qe.c: use of_property_read_* helpers Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 23/47] soc: fsl: qe: qe_io.c: don't open-code of_parse_phandle() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 24/47] soc: fsl: qe: qe_io.c: access device tree property using be32_to_cpu Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 25/47] soc: fsl: qe: qe_io.c: use of_property_read_u32() in par_io_init() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 26/47] soc: fsl: move cpm.h from powerpc/include/asm to include/soc/fsl Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 27/47] soc/fsl/qe/qe.h: update include path for cpm.h Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 28/47] serial: ucc_uart: explicitly include soc/fsl/cpm.h Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 29/47] serial: ucc_uart: replace ppc-specific IO accessors Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 30/47] serial: ucc_uart: factor out soft_uart initialization Rasmus Villemoes
2019-11-14  5:14   ` Timur Tabi
2019-11-14  9:00     ` Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 31/47] serial: ucc_uart: stub out soft_uart_init for !CONFIG_PPC32 Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 32/47] serial: ucc_uart: use of_property_read_u32() in ucc_uart_probe() Rasmus Villemoes
2019-11-14 13:57   ` Timur Tabi
2019-11-15  8:01     ` Rasmus Villemoes
2019-11-15 14:35       ` Timur Tabi
2019-11-15 22:44         ` Scott Wood
2019-11-15  4:25   ` Timur Tabi
2019-11-15  7:57     ` Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 33/47] serial: ucc_uart: access __be32 field using be32_to_cpu Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 34/47] soc: fsl: qe: change return type of cpm_muram_alloc() to s32 Rasmus Villemoes
2019-11-12  8:01   ` Qiang Zhao
2019-11-12  8:17     ` Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 35/47] soc: fsl: qe: make cpm_muram_free() return void Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 36/47] soc: fsl: qe: make cpm_muram_free() ignore a negative offset Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 37/47] soc: fsl: qe: drop broken lazy call of cpm_muram_init() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 38/47] soc: fsl: qe: refactor cpm_muram_alloc_common to prevent BUG on error path Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 39/47] soc: fsl: qe: avoid IS_ERR_VALUE in ucc_slow.c Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 40/47] soc: fsl: qe: drop use of IS_ERR_VALUE in qe_sdma_init() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 41/47] soc: fsl: qe: drop pointless check " Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 42/47] soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.c Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 43/47] net/wan/fsl_ucc_hdlc: avoid use of IS_ERR_VALUE() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 44/47] net/wan/fsl_ucc_hdlc: fix reading of __be16 registers Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 45/47] net/wan/fsl_ucc_hdlc: reject muram offsets above 64K Rasmus Villemoes
2019-11-15  4:41   ` Timur Tabi
2019-11-15  7:44     ` Rasmus Villemoes
2019-11-15 14:33       ` Timur Tabi
2019-11-08 13:01 ` [PATCH v4 46/47] net: ethernet: freescale: make UCC_GETH explicitly depend on PPC32 Rasmus Villemoes
2019-11-15  4:35   ` Timur Tabi
2019-11-15  5:44     ` Li Yang
2019-11-15  7:54       ` Rasmus Villemoes
2019-11-15 14:32         ` Timur Tabi
2019-11-15 14:31       ` Timur Tabi
2019-11-08 13:01 ` [PATCH v4 47/47] soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE Rasmus Villemoes
2019-11-08 23:48   ` Li Yang
2019-11-11  7:33     ` Rasmus Villemoes
2019-11-11 18:11       ` Li Yang
2019-11-13  2:48   ` Qiang Zhao
2019-11-20 19:42   ` kbuild test robot
2019-11-11 23:39 ` [PATCH v4 00/47] QUICC Engine support on ARM and ARM64 Li Yang
2019-11-12 20:45   ` Li Yang
2019-11-13  7:26     ` Rasmus Villemoes

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