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From: Rasmus Villemoes <linux@rasmusvillemoes.dk>
To: Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
	Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Scott Wood <oss@buserror.net>,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 26/47] soc: fsl: move cpm.h from powerpc/include/asm to include/soc/fsl
Date: Fri,  8 Nov 2019 14:01:02 +0100
Message-ID: <20191108130123.6839-27-linux@rasmusvillemoes.dk> (raw)
In-Reply-To: <20191108130123.6839-1-linux@rasmusvillemoes.dk>

Some drivers, e.g. ucc_uart, need definitions from cpm.h. In order to
allow building those drivers for non-ppc based SOCs, move the header
to include/soc/fsl. For now, leave a trivial wrapper at the old
location so drivers can be updated one by one.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
 arch/powerpc/include/asm/cpm.h | 172 +--------------------------------
 include/soc/fsl/cpm.h          | 171 ++++++++++++++++++++++++++++++++
 2 files changed, 172 insertions(+), 171 deletions(-)
 create mode 100644 include/soc/fsl/cpm.h

diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index 4c24ea8209bb..ce483b0f8a4d 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -1,171 +1 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __CPM_H
-#define __CPM_H
-
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/of.h>
-#include <soc/fsl/qe/qe.h>
-
-/*
- * SPI Parameter RAM common to QE and CPM.
- */
-struct spi_pram {
-	__be16	rbase;	/* Rx Buffer descriptor base address */
-	__be16	tbase;	/* Tx Buffer descriptor base address */
-	u8	rfcr;	/* Rx function code */
-	u8	tfcr;	/* Tx function code */
-	__be16	mrblr;	/* Max receive buffer length */
-	__be32	rstate;	/* Internal */
-	__be32	rdp;	/* Internal */
-	__be16	rbptr;	/* Internal */
-	__be16	rbc;	/* Internal */
-	__be32	rxtmp;	/* Internal */
-	__be32	tstate;	/* Internal */
-	__be32	tdp;	/* Internal */
-	__be16	tbptr;	/* Internal */
-	__be16	tbc;	/* Internal */
-	__be32	txtmp;	/* Internal */
-	__be32	res;	/* Tx temp. */
-	__be16  rpbase;	/* Relocation pointer (CPM1 only) */
-	__be16	res1;	/* Reserved */
-};
-
-/*
- * USB Controller pram common to QE and CPM.
- */
-struct usb_ctlr {
-	u8	usb_usmod;
-	u8	usb_usadr;
-	u8	usb_uscom;
-	u8	res1[1];
-	__be16	usb_usep[4];
-	u8	res2[4];
-	__be16	usb_usber;
-	u8	res3[2];
-	__be16	usb_usbmr;
-	u8	res4[1];
-	u8	usb_usbs;
-	/* Fields down below are QE-only */
-	__be16	usb_ussft;
-	u8	res5[2];
-	__be16	usb_usfrn;
-	u8	res6[0x22];
-} __attribute__ ((packed));
-
-/*
- * Function code bits, usually generic to devices.
- */
-#ifdef CONFIG_CPM1
-#define CPMFCR_GBL	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
-#define CPMFCR_TC2	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
-#define CPMFCR_DTB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
-#define CPMFCR_BDB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
-#else
-#define CPMFCR_GBL	((u_char)0x20)	/* Set memory snooping */
-#define CPMFCR_TC2	((u_char)0x04)	/* Transfer code 2 value */
-#define CPMFCR_DTB	((u_char)0x02)	/* Use local bus for data when set */
-#define CPMFCR_BDB	((u_char)0x01)	/* Use local bus for BD when set */
-#endif
-#define CPMFCR_EB	((u_char)0x10)	/* Set big endian byte order */
-
-/* Opcodes common to CPM1 and CPM2
-*/
-#define CPM_CR_INIT_TRX		((ushort)0x0000)
-#define CPM_CR_INIT_RX		((ushort)0x0001)
-#define CPM_CR_INIT_TX		((ushort)0x0002)
-#define CPM_CR_HUNT_MODE	((ushort)0x0003)
-#define CPM_CR_STOP_TX		((ushort)0x0004)
-#define CPM_CR_GRA_STOP_TX	((ushort)0x0005)
-#define CPM_CR_RESTART_TX	((ushort)0x0006)
-#define CPM_CR_CLOSE_RX_BD	((ushort)0x0007)
-#define CPM_CR_SET_GADDR	((ushort)0x0008)
-#define CPM_CR_SET_TIMER	((ushort)0x0008)
-#define CPM_CR_STOP_IDMA	((ushort)0x000b)
-
-/* Buffer descriptors used by many of the CPM protocols. */
-typedef struct cpm_buf_desc {
-	ushort	cbd_sc;		/* Status and Control */
-	ushort	cbd_datlen;	/* Data length in buffer */
-	uint	cbd_bufaddr;	/* Buffer address in host memory */
-} cbd_t;
-
-/* Buffer descriptor control/status used by serial
- */
-
-#define BD_SC_EMPTY	(0x8000)	/* Receive is empty */
-#define BD_SC_READY	(0x8000)	/* Transmit is ready */
-#define BD_SC_WRAP	(0x2000)	/* Last buffer descriptor */
-#define BD_SC_INTRPT	(0x1000)	/* Interrupt on change */
-#define BD_SC_LAST	(0x0800)	/* Last buffer in frame */
-#define BD_SC_TC	(0x0400)	/* Transmit CRC */
-#define BD_SC_CM	(0x0200)	/* Continuous mode */
-#define BD_SC_ID	(0x0100)	/* Rec'd too many idles */
-#define BD_SC_P		(0x0100)	/* xmt preamble */
-#define BD_SC_BR	(0x0020)	/* Break received */
-#define BD_SC_FR	(0x0010)	/* Framing error */
-#define BD_SC_PR	(0x0008)	/* Parity error */
-#define BD_SC_NAK	(0x0004)	/* NAK - did not respond */
-#define BD_SC_OV	(0x0002)	/* Overrun */
-#define BD_SC_UN	(0x0002)	/* Underrun */
-#define BD_SC_CD	(0x0001)	/* */
-#define BD_SC_CL	(0x0001)	/* Collision */
-
-/* Buffer descriptor control/status used by Ethernet receive.
- * Common to SCC and FCC.
- */
-#define BD_ENET_RX_EMPTY	(0x8000)
-#define BD_ENET_RX_WRAP		(0x2000)
-#define BD_ENET_RX_INTR		(0x1000)
-#define BD_ENET_RX_LAST		(0x0800)
-#define BD_ENET_RX_FIRST	(0x0400)
-#define BD_ENET_RX_MISS		(0x0100)
-#define BD_ENET_RX_BC		(0x0080)	/* FCC Only */
-#define BD_ENET_RX_MC		(0x0040)	/* FCC Only */
-#define BD_ENET_RX_LG		(0x0020)
-#define BD_ENET_RX_NO		(0x0010)
-#define BD_ENET_RX_SH		(0x0008)
-#define BD_ENET_RX_CR		(0x0004)
-#define BD_ENET_RX_OV		(0x0002)
-#define BD_ENET_RX_CL		(0x0001)
-#define BD_ENET_RX_STATS	(0x01ff)	/* All status bits */
-
-/* Buffer descriptor control/status used by Ethernet transmit.
- * Common to SCC and FCC.
- */
-#define BD_ENET_TX_READY	(0x8000)
-#define BD_ENET_TX_PAD		(0x4000)
-#define BD_ENET_TX_WRAP		(0x2000)
-#define BD_ENET_TX_INTR		(0x1000)
-#define BD_ENET_TX_LAST		(0x0800)
-#define BD_ENET_TX_TC		(0x0400)
-#define BD_ENET_TX_DEF		(0x0200)
-#define BD_ENET_TX_HB		(0x0100)
-#define BD_ENET_TX_LC		(0x0080)
-#define BD_ENET_TX_RL		(0x0040)
-#define BD_ENET_TX_RCMASK	(0x003c)
-#define BD_ENET_TX_UN		(0x0002)
-#define BD_ENET_TX_CSL		(0x0001)
-#define BD_ENET_TX_STATS	(0x03ff)	/* All status bits */
-
-/* Buffer descriptor control/status used by Transparent mode SCC.
- */
-#define BD_SCC_TX_LAST		(0x0800)
-
-/* Buffer descriptor control/status used by I2C.
- */
-#define BD_I2C_START		(0x0400)
-
-#ifdef CONFIG_CPM
-int cpm_command(u32 command, u8 opcode);
-#else
-static inline int cpm_command(u32 command, u8 opcode)
-{
-	return -ENOSYS;
-}
-#endif /* CONFIG_CPM */
-
-int cpm2_gpiochip_add32(struct device *dev);
-
-#endif
+#include <soc/fsl/cpm.h>
diff --git a/include/soc/fsl/cpm.h b/include/soc/fsl/cpm.h
new file mode 100644
index 000000000000..4c24ea8209bb
--- /dev/null
+++ b/include/soc/fsl/cpm.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __CPM_H
+#define __CPM_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/of.h>
+#include <soc/fsl/qe/qe.h>
+
+/*
+ * SPI Parameter RAM common to QE and CPM.
+ */
+struct spi_pram {
+	__be16	rbase;	/* Rx Buffer descriptor base address */
+	__be16	tbase;	/* Tx Buffer descriptor base address */
+	u8	rfcr;	/* Rx function code */
+	u8	tfcr;	/* Tx function code */
+	__be16	mrblr;	/* Max receive buffer length */
+	__be32	rstate;	/* Internal */
+	__be32	rdp;	/* Internal */
+	__be16	rbptr;	/* Internal */
+	__be16	rbc;	/* Internal */
+	__be32	rxtmp;	/* Internal */
+	__be32	tstate;	/* Internal */
+	__be32	tdp;	/* Internal */
+	__be16	tbptr;	/* Internal */
+	__be16	tbc;	/* Internal */
+	__be32	txtmp;	/* Internal */
+	__be32	res;	/* Tx temp. */
+	__be16  rpbase;	/* Relocation pointer (CPM1 only) */
+	__be16	res1;	/* Reserved */
+};
+
+/*
+ * USB Controller pram common to QE and CPM.
+ */
+struct usb_ctlr {
+	u8	usb_usmod;
+	u8	usb_usadr;
+	u8	usb_uscom;
+	u8	res1[1];
+	__be16	usb_usep[4];
+	u8	res2[4];
+	__be16	usb_usber;
+	u8	res3[2];
+	__be16	usb_usbmr;
+	u8	res4[1];
+	u8	usb_usbs;
+	/* Fields down below are QE-only */
+	__be16	usb_ussft;
+	u8	res5[2];
+	__be16	usb_usfrn;
+	u8	res6[0x22];
+} __attribute__ ((packed));
+
+/*
+ * Function code bits, usually generic to devices.
+ */
+#ifdef CONFIG_CPM1
+#define CPMFCR_GBL	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
+#define CPMFCR_TC2	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
+#define CPMFCR_DTB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
+#define CPMFCR_BDB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
+#else
+#define CPMFCR_GBL	((u_char)0x20)	/* Set memory snooping */
+#define CPMFCR_TC2	((u_char)0x04)	/* Transfer code 2 value */
+#define CPMFCR_DTB	((u_char)0x02)	/* Use local bus for data when set */
+#define CPMFCR_BDB	((u_char)0x01)	/* Use local bus for BD when set */
+#endif
+#define CPMFCR_EB	((u_char)0x10)	/* Set big endian byte order */
+
+/* Opcodes common to CPM1 and CPM2
+*/
+#define CPM_CR_INIT_TRX		((ushort)0x0000)
+#define CPM_CR_INIT_RX		((ushort)0x0001)
+#define CPM_CR_INIT_TX		((ushort)0x0002)
+#define CPM_CR_HUNT_MODE	((ushort)0x0003)
+#define CPM_CR_STOP_TX		((ushort)0x0004)
+#define CPM_CR_GRA_STOP_TX	((ushort)0x0005)
+#define CPM_CR_RESTART_TX	((ushort)0x0006)
+#define CPM_CR_CLOSE_RX_BD	((ushort)0x0007)
+#define CPM_CR_SET_GADDR	((ushort)0x0008)
+#define CPM_CR_SET_TIMER	((ushort)0x0008)
+#define CPM_CR_STOP_IDMA	((ushort)0x000b)
+
+/* Buffer descriptors used by many of the CPM protocols. */
+typedef struct cpm_buf_desc {
+	ushort	cbd_sc;		/* Status and Control */
+	ushort	cbd_datlen;	/* Data length in buffer */
+	uint	cbd_bufaddr;	/* Buffer address in host memory */
+} cbd_t;
+
+/* Buffer descriptor control/status used by serial
+ */
+
+#define BD_SC_EMPTY	(0x8000)	/* Receive is empty */
+#define BD_SC_READY	(0x8000)	/* Transmit is ready */
+#define BD_SC_WRAP	(0x2000)	/* Last buffer descriptor */
+#define BD_SC_INTRPT	(0x1000)	/* Interrupt on change */
+#define BD_SC_LAST	(0x0800)	/* Last buffer in frame */
+#define BD_SC_TC	(0x0400)	/* Transmit CRC */
+#define BD_SC_CM	(0x0200)	/* Continuous mode */
+#define BD_SC_ID	(0x0100)	/* Rec'd too many idles */
+#define BD_SC_P		(0x0100)	/* xmt preamble */
+#define BD_SC_BR	(0x0020)	/* Break received */
+#define BD_SC_FR	(0x0010)	/* Framing error */
+#define BD_SC_PR	(0x0008)	/* Parity error */
+#define BD_SC_NAK	(0x0004)	/* NAK - did not respond */
+#define BD_SC_OV	(0x0002)	/* Overrun */
+#define BD_SC_UN	(0x0002)	/* Underrun */
+#define BD_SC_CD	(0x0001)	/* */
+#define BD_SC_CL	(0x0001)	/* Collision */
+
+/* Buffer descriptor control/status used by Ethernet receive.
+ * Common to SCC and FCC.
+ */
+#define BD_ENET_RX_EMPTY	(0x8000)
+#define BD_ENET_RX_WRAP		(0x2000)
+#define BD_ENET_RX_INTR		(0x1000)
+#define BD_ENET_RX_LAST		(0x0800)
+#define BD_ENET_RX_FIRST	(0x0400)
+#define BD_ENET_RX_MISS		(0x0100)
+#define BD_ENET_RX_BC		(0x0080)	/* FCC Only */
+#define BD_ENET_RX_MC		(0x0040)	/* FCC Only */
+#define BD_ENET_RX_LG		(0x0020)
+#define BD_ENET_RX_NO		(0x0010)
+#define BD_ENET_RX_SH		(0x0008)
+#define BD_ENET_RX_CR		(0x0004)
+#define BD_ENET_RX_OV		(0x0002)
+#define BD_ENET_RX_CL		(0x0001)
+#define BD_ENET_RX_STATS	(0x01ff)	/* All status bits */
+
+/* Buffer descriptor control/status used by Ethernet transmit.
+ * Common to SCC and FCC.
+ */
+#define BD_ENET_TX_READY	(0x8000)
+#define BD_ENET_TX_PAD		(0x4000)
+#define BD_ENET_TX_WRAP		(0x2000)
+#define BD_ENET_TX_INTR		(0x1000)
+#define BD_ENET_TX_LAST		(0x0800)
+#define BD_ENET_TX_TC		(0x0400)
+#define BD_ENET_TX_DEF		(0x0200)
+#define BD_ENET_TX_HB		(0x0100)
+#define BD_ENET_TX_LC		(0x0080)
+#define BD_ENET_TX_RL		(0x0040)
+#define BD_ENET_TX_RCMASK	(0x003c)
+#define BD_ENET_TX_UN		(0x0002)
+#define BD_ENET_TX_CSL		(0x0001)
+#define BD_ENET_TX_STATS	(0x03ff)	/* All status bits */
+
+/* Buffer descriptor control/status used by Transparent mode SCC.
+ */
+#define BD_SCC_TX_LAST		(0x0800)
+
+/* Buffer descriptor control/status used by I2C.
+ */
+#define BD_I2C_START		(0x0400)
+
+#ifdef CONFIG_CPM
+int cpm_command(u32 command, u8 opcode);
+#else
+static inline int cpm_command(u32 command, u8 opcode)
+{
+	return -ENOSYS;
+}
+#endif /* CONFIG_CPM */
+
+int cpm2_gpiochip_add32(struct device *dev);
+
+#endif
-- 
2.23.0


  parent reply index

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-08 13:00 [PATCH v4 00/47] QUICC Engine support on ARM and ARM64 Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 01/47] soc: fsl: qe: remove space-before-tab Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 02/47] soc: fsl: qe: drop volatile qualifier of struct qe_ic::regs Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 03/47] soc: fsl: qe: rename qe_(clr/set/clrset)bit* helpers Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read,write}* wrappers Rasmus Villemoes
2019-11-12  5:17   ` [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read, write}* wrappers Timur Tabi
2019-11-12  7:14     ` [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read,write}* wrappers Rasmus Villemoes
2019-11-14  5:08       ` Timur Tabi
2019-11-14  8:55         ` Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 05/47] soc: fsl: qe: avoid ppc-specific io accessors Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 06/47] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 07/47] soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32 Rasmus Villemoes
2019-11-15  4:50   ` Timur Tabi
2019-11-15  8:11     ` Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 08/47] soc: fsl: qe: drop unneeded #includes Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 09/47] soc: fsl: qe: drop assign-only high_active in qe_ic_init Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 10/47] soc: fsl: qe: remove pointless sysfs registration in qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 11/47] soc: fsl: qe: use qe_ic_cascade_{low, high}_mpic also on 83xx Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 12/47] soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/ Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 13/47] powerpc/83xx: remove mpc83xx_ipic_and_qe_init_IRQ Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 14/47] powerpc/85xx: remove mostly pointless mpc85xx_qe_init() Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 15/47] soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 16/47] soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_low Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 17/47] soc: fsl: qe: remove unused qe_ic_set_* functions Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 18/47] soc: fsl: qe: don't use NO_IRQ in qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 19/47] soc: fsl: qe: make qe_ic_get_{low,high}_irq static Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 20/47] soc: fsl: qe: simplify qe_ic_init() Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 21/47] soc: fsl: qe: merge qe_ic.h headers into qe_ic.c Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 22/47] soc: fsl: qe: qe.c: use of_property_read_* helpers Rasmus Villemoes
2019-11-08 13:00 ` [PATCH v4 23/47] soc: fsl: qe: qe_io.c: don't open-code of_parse_phandle() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 24/47] soc: fsl: qe: qe_io.c: access device tree property using be32_to_cpu Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 25/47] soc: fsl: qe: qe_io.c: use of_property_read_u32() in par_io_init() Rasmus Villemoes
2019-11-08 13:01 ` Rasmus Villemoes [this message]
2019-11-08 13:01 ` [PATCH v4 27/47] soc/fsl/qe/qe.h: update include path for cpm.h Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 28/47] serial: ucc_uart: explicitly include soc/fsl/cpm.h Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 29/47] serial: ucc_uart: replace ppc-specific IO accessors Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 30/47] serial: ucc_uart: factor out soft_uart initialization Rasmus Villemoes
2019-11-14  5:14   ` Timur Tabi
2019-11-14  9:00     ` Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 31/47] serial: ucc_uart: stub out soft_uart_init for !CONFIG_PPC32 Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 32/47] serial: ucc_uart: use of_property_read_u32() in ucc_uart_probe() Rasmus Villemoes
2019-11-14 13:57   ` Timur Tabi
2019-11-15  8:01     ` Rasmus Villemoes
2019-11-15 14:35       ` Timur Tabi
2019-11-15 22:44         ` Scott Wood
2019-11-15  4:25   ` Timur Tabi
2019-11-15  7:57     ` Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 33/47] serial: ucc_uart: access __be32 field using be32_to_cpu Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 34/47] soc: fsl: qe: change return type of cpm_muram_alloc() to s32 Rasmus Villemoes
2019-11-12  8:01   ` Qiang Zhao
2019-11-12  8:17     ` Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 35/47] soc: fsl: qe: make cpm_muram_free() return void Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 36/47] soc: fsl: qe: make cpm_muram_free() ignore a negative offset Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 37/47] soc: fsl: qe: drop broken lazy call of cpm_muram_init() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 38/47] soc: fsl: qe: refactor cpm_muram_alloc_common to prevent BUG on error path Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 39/47] soc: fsl: qe: avoid IS_ERR_VALUE in ucc_slow.c Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 40/47] soc: fsl: qe: drop use of IS_ERR_VALUE in qe_sdma_init() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 41/47] soc: fsl: qe: drop pointless check " Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 42/47] soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.c Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 43/47] net/wan/fsl_ucc_hdlc: avoid use of IS_ERR_VALUE() Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 44/47] net/wan/fsl_ucc_hdlc: fix reading of __be16 registers Rasmus Villemoes
2019-11-08 13:01 ` [PATCH v4 45/47] net/wan/fsl_ucc_hdlc: reject muram offsets above 64K Rasmus Villemoes
2019-11-15  4:41   ` Timur Tabi
2019-11-15  7:44     ` Rasmus Villemoes
2019-11-15 14:33       ` Timur Tabi
2019-11-08 13:01 ` [PATCH v4 46/47] net: ethernet: freescale: make UCC_GETH explicitly depend on PPC32 Rasmus Villemoes
2019-11-15  4:35   ` Timur Tabi
2019-11-15  5:44     ` Li Yang
2019-11-15  7:54       ` Rasmus Villemoes
2019-11-15 14:32         ` Timur Tabi
2019-11-15 14:31       ` Timur Tabi
2019-11-08 13:01 ` [PATCH v4 47/47] soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE Rasmus Villemoes
2019-11-08 23:48   ` Li Yang
2019-11-11  7:33     ` Rasmus Villemoes
2019-11-11 18:11       ` Li Yang
2019-11-13  2:48   ` Qiang Zhao
2019-11-20 19:42   ` kbuild test robot
2019-11-11 23:39 ` [PATCH v4 00/47] QUICC Engine support on ARM and ARM64 Li Yang
2019-11-12 20:45   ` Li Yang
2019-11-13  7:26     ` Rasmus Villemoes

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