From: Jordan Niethe <jniethe5@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: alistair@popple.id.au, npiggin@gmail.com, bala24@linux.ibm.com,
Jordan Niethe <jniethe5@gmail.com>,
dja@axtens.net
Subject: [PATCH v4 05/16] powerpc: Use a function for masking instructions
Date: Fri, 20 Mar 2020 16:17:58 +1100 [thread overview]
Message-ID: <20200320051809.24332-6-jniethe5@gmail.com> (raw)
In-Reply-To: <20200320051809.24332-1-jniethe5@gmail.com>
In preparation for using an instruction data type that can not be used
directly with the '&' operator, use a function to mask instructions.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
v4: New to series
---
arch/powerpc/include/asm/sstep.h | 6 +++---
arch/powerpc/kernel/align.c | 2 +-
arch/powerpc/kernel/trace/ftrace.c | 8 ++++----
arch/powerpc/lib/code-patching.c | 12 ++++++------
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/include/asm/sstep.h b/arch/powerpc/include/asm/sstep.h
index 9353916fcba7..ef5483288920 100644
--- a/arch/powerpc/include/asm/sstep.h
+++ b/arch/powerpc/include/asm/sstep.h
@@ -16,9 +16,9 @@ struct pt_regs;
* Note that IS_MTMSRD returns true for both an mtmsr (32-bit)
* and an mtmsrd (64-bit).
*/
-#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124)
-#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024)
-#define IS_RFI(instr) (((instr) & 0xfc0007fe) == 0x4c000064)
+#define IS_MTMSRD(instr) ((ppc_inst_mask((instr), 0xfc0007be) == 0x7c000124))
+#define IS_RFID(instr) ((ppc_inst_mask((instr), 0xfc0007fe) == 0x4c000024))
+#define IS_RFI(instr) ((ppc_inst_mask((instr), 0xfc0007fe) == 0x4c000064))
enum instruction_type {
COMPUTE, /* arith/logical/CR op, etc. */
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 6008f14a145b..38542fffa179 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -331,7 +331,7 @@ int fix_alignment(struct pt_regs *regs)
* when pasting to a co-processor. Furthermore, paste_last is the
* synchronisation point for preceding copy/paste sequences.
*/
- if ((instr & 0xfc0006fe) == (PPC_INST_COPY & 0xfc0006fe))
+ if (ppc_inst_mask(instr, 0xfc0006fe) == (PPC_INST_COPY & 0xfc0006fe))
return -EIO;
r = analyse_instr(&op, regs, instr);
diff --git a/arch/powerpc/kernel/trace/ftrace.c b/arch/powerpc/kernel/trace/ftrace.c
index 380f1ce77715..b189a34baaa2 100644
--- a/arch/powerpc/kernel/trace/ftrace.c
+++ b/arch/powerpc/kernel/trace/ftrace.c
@@ -98,19 +98,19 @@ static ppc_inst test_24bit_addr(unsigned long ip, unsigned long addr)
static int is_bl_op(ppc_inst op)
{
- return (op & 0xfc000003) == 0x48000001;
+ return ppc_inst_mask(op, 0xfc000003) == 0x48000001;
}
static int is_b_op(ppc_inst op)
{
- return (op & 0xfc000003) == 0x48000000;
+ return ppc_inst_mask(op, 0xfc000003) == 0x48000000;
}
static unsigned long find_bl_target(unsigned long ip, ppc_inst op)
{
int offset;
- offset = (op & 0x03fffffc);
+ offset = ppc_inst_mask(op, 0x03fffffc);
/* make it signed */
if (offset & 0x02000000)
offset |= 0xfe000000;
@@ -494,7 +494,7 @@ expected_nop_sequence(void *ip, ppc_inst op0, ppc_inst op1)
* The load offset is different depending on the ABI. For simplicity
* just mask it out when doing the compare.
*/
- if ((op0 != 0x48000008) || ((op1 & 0xffff0000) != 0xe8410000))
+ if ((op0 != 0x48000008) || (ppc_inst_mask(op1, 0xffff0000) != 0xe8410000))
return 0;
return 1;
}
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 5d69e836337d..e2ba23fd6f4d 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -301,7 +301,7 @@ static int instr_is_branch_bform(ppc_inst instr)
int instr_is_relative_branch(ppc_inst instr)
{
- if (instr & BRANCH_ABSOLUTE)
+ if (ppc_inst_mask(instr, BRANCH_ABSOLUTE))
return 0;
return instr_is_branch_iform(instr) || instr_is_branch_bform(instr);
@@ -309,20 +309,20 @@ int instr_is_relative_branch(ppc_inst instr)
int instr_is_relative_link_branch(ppc_inst instr)
{
- return instr_is_relative_branch(instr) && (instr & BRANCH_SET_LINK);
+ return instr_is_relative_branch(instr) && ppc_inst_mask(instr, BRANCH_SET_LINK);
}
static unsigned long branch_iform_target(const ppc_inst *instr)
{
signed long imm;
- imm = *instr & 0x3FFFFFC;
+ imm = ppc_inst_mask(*instr, 0x3FFFFFC);
/* If the top bit of the immediate value is set this is negative */
if (imm & 0x2000000)
imm -= 0x4000000;
- if ((*instr & BRANCH_ABSOLUTE) == 0)
+ if ((ppc_inst_mask(*instr, BRANCH_ABSOLUTE)) == 0)
imm += (unsigned long)instr;
return (unsigned long)imm;
@@ -332,13 +332,13 @@ static unsigned long branch_bform_target(const ppc_inst *instr)
{
signed long imm;
- imm = *instr & 0xFFFC;
+ imm = ppc_inst_mask(*instr, 0xFFFC);
/* If the top bit of the immediate value is set this is negative */
if (imm & 0x8000)
imm -= 0x10000;
- if ((*instr & BRANCH_ABSOLUTE) == 0)
+ if ((ppc_inst_mask(*instr, BRANCH_ABSOLUTE)) == 0)
imm += (unsigned long)instr;
return (unsigned long)imm;
--
2.17.1
next prev parent reply other threads:[~2020-03-20 5:29 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-20 5:17 [PATCH v4 00/16] Initial Prefixed Instruction support Jordan Niethe
2020-03-20 5:17 ` [PATCH v4 01/16] powerpc/xmon: Remove store_inst() for patch_instruction() Jordan Niethe
2020-03-23 6:19 ` Nicholas Piggin
2020-03-20 5:17 ` [PATCH v4 02/16] xmon: Move out-of-line instructions to text section Jordan Niethe
2020-03-23 5:59 ` Balamuruhan S
2020-03-23 6:05 ` Balamuruhan S
2020-03-23 9:26 ` Jordan Niethe
2020-03-23 6:22 ` Nicholas Piggin
2020-03-20 5:17 ` [PATCH v4 03/16] powerpc: Use a datatype for instructions Jordan Niethe
2020-03-23 6:07 ` Balamuruhan S
2020-03-23 6:23 ` Nicholas Piggin
2020-03-23 9:28 ` Jordan Niethe
2020-03-23 9:51 ` Nicholas Piggin
2020-03-24 2:58 ` Michael Ellerman
2020-03-24 3:21 ` Jordan Niethe
2020-04-01 10:32 ` Balamuruhan S
2020-04-01 23:52 ` Jordan Niethe
2020-04-02 23:44 ` Alistair Popple
2020-04-03 0:09 ` Jordan Niethe
2020-03-20 5:17 ` [PATCH v4 04/16] powerpc: Use a macro for creating instructions from u32s Jordan Niethe
2020-03-23 6:26 ` Nicholas Piggin
2020-03-23 9:29 ` Jordan Niethe
2020-03-20 5:17 ` Jordan Niethe [this message]
2020-03-23 6:37 ` [PATCH v4 05/16] powerpc: Use a function for masking instructions Nicholas Piggin
2020-03-23 9:31 ` Jordan Niethe
2020-03-20 5:17 ` [PATCH v4 06/16] powerpc: Use a function for getting the instruction op code Jordan Niethe
2020-03-23 6:54 ` Balamuruhan S
2020-03-23 9:35 ` Jordan Niethe
2020-03-20 5:18 ` [PATCH v4 07/16] powerpc: Introduce functions for instruction nullity and equality Jordan Niethe
2020-03-23 6:43 ` Nicholas Piggin
2020-03-23 9:31 ` Jordan Niethe
2020-03-20 5:18 ` [PATCH v4 08/16] powerpc: Use an accessor for word instructions Jordan Niethe
2020-03-23 11:12 ` Balamuruhan S
2020-03-24 3:18 ` Jordan Niethe
2020-03-24 6:22 ` Balamuruhan S
2020-03-20 5:18 ` [PATCH v4 09/16] powerpc: Use a function for reading instructions Jordan Niethe
2020-03-23 8:00 ` Nicholas Piggin
2020-03-23 8:43 ` Balamuruhan S
2020-03-23 10:09 ` Jordan Niethe
2020-03-23 10:36 ` Nicholas Piggin
2020-03-20 5:18 ` [PATCH v4 10/16] powerpc: Make test_translate_branch() independent of instruction length Jordan Niethe
2020-03-20 5:18 ` [PATCH v4 11/16] powerpc: Enable Prefixed Instructions Jordan Niethe
2020-03-23 7:02 ` Nicholas Piggin
2020-03-20 5:18 ` [PATCH v4 12/16] powerpc: Define new SRR1 bits for a future ISA version Jordan Niethe
2020-03-23 7:03 ` Nicholas Piggin
2020-03-20 5:18 ` [PATCH v4 13/16] powerpc: Support prefixed instructions in alignment handler Jordan Niethe
2020-03-23 7:05 ` Nicholas Piggin
2020-03-23 9:35 ` Jordan Niethe
2020-03-20 5:18 ` [PATCH v4 14/16] powerpc64: Add prefixed instructions to instruction data type Jordan Niethe
2020-03-23 6:58 ` Nicholas Piggin
2020-03-23 7:33 ` Nicholas Piggin
2020-03-23 23:45 ` Jordan Niethe
2020-03-24 5:40 ` Nicholas Piggin
2020-03-30 9:05 ` Alistair Popple
2020-03-30 9:13 ` Jordan Niethe
2020-03-20 5:18 ` [PATCH v4 15/16] powerpc sstep: Add support for prefixed load/stores Jordan Niethe
2020-03-23 8:54 ` Balamuruhan S
2020-03-20 5:18 ` [PATCH v4 16/16] powerpc sstep: Add support for prefixed fixed-point arithmetic Jordan Niethe
2020-03-23 10:05 ` Balamuruhan S
2020-03-23 6:18 ` [PATCH v4 00/16] Initial Prefixed Instruction support Nicholas Piggin
2020-03-23 9:25 ` Jordan Niethe
2020-03-23 10:17 ` Nicholas Piggin
2020-03-24 2:54 ` Jordan Niethe
2020-03-24 2:59 ` Jordan Niethe
2020-03-24 5:44 ` Nicholas Piggin
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