From: Alexey Kardashevskiy <aik@ozlabs.ru>
To: linuxppc-dev@lists.ozlabs.org
Cc: kvm@vger.kernel.org, Fabiano Rosas <farosas@linux.ibm.com>,
Alexey Kardashevskiy <aik@ozlabs.ru>,
Alistair Popple <alistair@popple.id.au>,
kvm-ppc@vger.kernel.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [PATCH kernel v2 0/7] powerpc/powenv/ioda: Allow huge DMA window at 4GB
Date: Mon, 23 Mar 2020 18:53:47 +1100 [thread overview]
Message-ID: <20200323075354.93825-1-aik@ozlabs.ru> (raw)
Here is an attempt to support bigger DMA space for devices
supporting DMA masks less than 59 bits (GPUs come into mind
first). POWER9 PHBs have an option to map 2 windows at 0
and select a windows based on DMA address being below or above
4GB.
This adds the "iommu=iommu_bypass" kernel parameter and
supports VFIO+pseries machine - current this requires telling
upstream+unmodified QEMU about this via
-global spapr-pci-host-bridge.dma64_win_addr=0x100000000
or per-phb property. 4/4 advertises the new option but
there is no automation around it in QEMU (should it be?).
For now it is either 1<<59 or 4GB mode; dynamic switching is
not supported (could be via sysfs).
This is a rebased version of
https://lore.kernel.org/kvm/20191202015953.127902-1-aik@ozlabs.ru/
The main change since v1 is that now it is 7 patches with
clearer separation of steps.
This is based on 6c90b86a745a "Merge tag 'mmc-v5.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc"
Please comment. Thanks.
Alexey Kardashevskiy (7):
powerpc/powernv/ioda: Move TCE bypass base to PE
powerpc/powernv/ioda: Rework for huge DMA window at 4GB
powerpc/powernv/ioda: Allow smaller TCE table levels
powerpc/powernv/phb4: Use IOMMU instead of bypassing
powerpc/iommu: Add a window number to
iommu_table_group_ops::get_table_size
powerpc/powernv/phb4: Add 4GB IOMMU bypass mode
vfio/spapr_tce: Advertise and allow a huge DMA windows at 4GB
arch/powerpc/include/asm/iommu.h | 3 +
arch/powerpc/include/asm/opal-api.h | 9 +-
arch/powerpc/include/asm/opal.h | 2 +
arch/powerpc/platforms/powernv/pci.h | 4 +-
include/uapi/linux/vfio.h | 2 +
arch/powerpc/platforms/powernv/npu-dma.c | 1 +
arch/powerpc/platforms/powernv/opal-call.c | 2 +
arch/powerpc/platforms/powernv/pci-ioda-tce.c | 4 +-
arch/powerpc/platforms/powernv/pci-ioda.c | 234 ++++++++++++++----
drivers/vfio/vfio_iommu_spapr_tce.c | 17 +-
10 files changed, 213 insertions(+), 65 deletions(-)
--
2.17.1
next reply other threads:[~2020-03-23 8:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-23 7:53 Alexey Kardashevskiy [this message]
2020-03-23 7:53 ` [PATCH kernel v2 1/7] powerpc/powernv/ioda: Move TCE bypass base to PE Alexey Kardashevskiy
2020-03-23 7:53 ` [PATCH kernel v2 2/7] powerpc/powernv/ioda: Rework for huge DMA window at 4GB Alexey Kardashevskiy
2020-03-23 7:53 ` [PATCH kernel v2 3/7] powerpc/powernv/ioda: Allow smaller TCE table levels Alexey Kardashevskiy
2020-03-23 7:53 ` [PATCH kernel v2 4/7] powerpc/powernv/phb4: Use IOMMU instead of bypassing Alexey Kardashevskiy
2020-03-23 7:53 ` [PATCH kernel v2 5/7] powerpc/iommu: Add a window number to iommu_table_group_ops::get_table_size Alexey Kardashevskiy
2020-03-23 7:53 ` [PATCH kernel v2 6/7] powerpc/powernv/phb4: Add 4GB IOMMU bypass mode Alexey Kardashevskiy
2020-03-23 7:53 ` [PATCH kernel v2 7/7] vfio/spapr_tce: Advertise and allow a huge DMA windows at 4GB Alexey Kardashevskiy
2020-04-08 9:43 ` [PATCH kernel v2 0/7] powerpc/powenv/ioda: Allow huge DMA window " Alexey Kardashevskiy
2020-04-16 1:27 ` Alexey Kardashevskiy
2020-04-16 2:34 ` Oliver O'Halloran
2020-04-16 2:53 ` Oliver O'Halloran
2020-04-17 1:26 ` Russell Currey
2020-04-17 5:47 ` Alexey Kardashevskiy
2020-04-20 14:04 ` Oliver O'Halloran
2020-04-21 5:11 ` Alexey Kardashevskiy
2020-04-21 6:35 ` Oliver O'Halloran
2020-04-22 6:49 ` Alexey Kardashevskiy
2020-04-22 9:11 ` Oliver O'Halloran
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