From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Al Viro <viro@zeniv.linux.org.uk>, Will Deacon <will@kernel.org>
Cc: linux-arch <linux-arch@vger.kernel.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
Kees Cook <keescook@chromium.org>, Dave Airlie <airlied@linux.ie>,
intel-gfx@lists.freedesktop.org, Peter Anvin <hpa@zytor.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux-MM <linux-mm@kvack.org>, Paul Mackerras <paulus@samba.org>,
Daniel Vetter <daniel@ffwll.ch>,
Andrew Morton <akpm@linux-foundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH v2 5/5] uaccess: Rename user_access_begin/end() to user_full_access_begin/end()
Date: Tue, 21 Apr 2020 10:12:56 +0100 [thread overview]
Message-ID: <20200421091256.GA25745@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200421024919.GA23230@ZenIV.linux.org.uk>
On Tue, Apr 21, 2020 at 03:49:19AM +0100, Al Viro wrote:
> The only source I'd been able to find speeks of >= 60 cycles
> (and possibly much more) for non-pipelined coprocessor instructions;
> the list of such does contain loads and stores to a bunch of registers.
> However, the register in question (p15/c3) has only store mentioned there,
> so loads might be cheap; no obvious reasons for those to be slow.
> That's a question to arm folks, I'm afraid... rmk?
I have no information on that; instruction timings are not defined
at architecture level (architecture reference manual), nor do I find
information in the CPU technical reference manual (which would be
specific to the CPU). Instruction timings tend to be implementation
dependent.
I've always consulted Will Deacon when I've needed to know whether
an instruction is expensive or not.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
next prev parent reply other threads:[~2020-04-21 9:16 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-03 7:20 [PATCH v2 1/5] uaccess: Add user_read_access_begin/end and user_write_access_begin/end Christophe Leroy
2020-04-03 7:20 ` [PATCH v2 2/5] uaccess: Selectively open read or write user access Christophe Leroy
2020-05-29 4:20 ` Michael Ellerman
2020-04-03 7:20 ` [PATCH v2 3/5] drm/i915/gem: Replace user_access_begin by user_write_access_begin Christophe Leroy
2020-05-29 4:20 ` Michael Ellerman
2020-04-03 7:20 ` [PATCH v2 4/5] powerpc/uaccess: Implement user_read_access_begin and user_write_access_begin Christophe Leroy
2020-05-29 4:24 ` Michael Ellerman
2020-04-03 7:20 ` [PATCH v2 5/5] uaccess: Rename user_access_begin/end() to user_full_access_begin/end() Christophe Leroy
2020-04-03 18:01 ` Linus Torvalds
2020-04-03 20:52 ` Al Viro
2020-04-21 2:49 ` Al Viro
2020-04-21 9:12 ` Russell King - ARM Linux admin [this message]
2020-04-21 18:34 ` Linus Torvalds
2020-04-05 18:47 ` Christophe Leroy
2020-04-04 6:20 ` kbuild test robot
2020-04-04 7:17 ` kbuild test robot
2020-05-29 4:20 ` [PATCH v2 1/5] uaccess: Add user_read_access_begin/end and user_write_access_begin/end Michael Ellerman
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