From: Jordan Niethe <jniethe5@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: alistair@popple.id.au, npiggin@gmail.com, bala24@linux.ibm.com,
Jordan Niethe <jniethe5@gmail.com>,
dja@axtens.net
Subject: [PATCH v6 08/28] powerpc: Use a function for getting the instruction op code
Date: Tue, 28 Apr 2020 11:57:54 +1000 [thread overview]
Message-ID: <20200428015814.15380-9-jniethe5@gmail.com> (raw)
In-Reply-To: <20200428015814.15380-1-jniethe5@gmail.com>
In preparation for using a data type for instructions that can not be
directly used with the '>>' operator use a function for getting the op
code of an instruction.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
v4: New to series
v6: - Rename ppc_inst_primary() to ppc_inst_primary_opcode()
- Use in vecemu.c, fault.c, sstep.c
- Move this patch after the ppc_inst_val() patch
---
arch/powerpc/include/asm/inst.h | 5 +++++
arch/powerpc/kernel/align.c | 2 +-
arch/powerpc/kernel/vecemu.c | 3 ++-
arch/powerpc/lib/code-patching.c | 4 ++--
arch/powerpc/lib/sstep.c | 2 +-
arch/powerpc/mm/fault.c | 3 ++-
6 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
index 8a9e73bfbd27..442a95f20de7 100644
--- a/arch/powerpc/include/asm/inst.h
+++ b/arch/powerpc/include/asm/inst.h
@@ -13,4 +13,9 @@ static inline u32 ppc_inst_val(u32 x)
return x;
}
+static inline int ppc_inst_primary_opcode(u32 x)
+{
+ return ppc_inst_val(x) >> 26;
+}
+
#endif /* _ASM_INST_H */
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 44921001f84a..47dbba81a227 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -314,7 +314,7 @@ int fix_alignment(struct pt_regs *regs)
}
#ifdef CONFIG_SPE
- if ((ppc_inst_val(instr) >> 26) == 0x4) {
+ if (ppc_inst_primary_opcode(instr) == 0x4) {
int reg = (ppc_inst_val(instr) >> 21) & 0x1f;
PPC_WARN_ALIGNMENT(spe, regs);
return emulate_spe(regs, reg, instr);
diff --git a/arch/powerpc/kernel/vecemu.c b/arch/powerpc/kernel/vecemu.c
index 1f5e3b4c8ae4..a544590b90e5 100644
--- a/arch/powerpc/kernel/vecemu.c
+++ b/arch/powerpc/kernel/vecemu.c
@@ -10,6 +10,7 @@
#include <asm/processor.h>
#include <asm/switch_to.h>
#include <linux/uaccess.h>
+#include <asm/inst.h>
/* Functions in vector.S */
extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
@@ -268,7 +269,7 @@ int emulate_altivec(struct pt_regs *regs)
return -EFAULT;
word = ppc_inst_val(instr);
- if ((word >> 26) != 4)
+ if (ppc_inst_primary_opcode(instr) != 4)
return -EINVAL; /* not an altivec instruction */
vd = (word >> 21) & 0x1f;
va = (word >> 16) & 0x1f;
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index baa849b1a1f9..f5c6dcbac44b 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -231,7 +231,7 @@ bool is_offset_in_branch_range(long offset)
*/
bool is_conditional_branch(unsigned int instr)
{
- unsigned int opcode = instr >> 26;
+ unsigned int opcode = ppc_inst_primary_opcode(instr);
if (opcode == 16) /* bc, bca, bcl, bcla */
return true;
@@ -289,7 +289,7 @@ int create_cond_branch(unsigned int *instr, const unsigned int *addr,
static unsigned int branch_opcode(unsigned int instr)
{
- return (instr >> 26) & 0x3F;
+ return ppc_inst_primary_opcode(instr) & 0x3F;
}
static int instr_is_branch_iform(unsigned int instr)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 337be1c4d23c..9ea77dc9256f 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1175,7 +1175,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
word = ppc_inst_val(instr);
op->type = COMPUTE;
- opcode = instr >> 26;
+ opcode = ppc_inst_primary_opcode(instr);
switch (opcode) {
case 16: /* bc */
op->type = BRANCH;
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 7c9f3f686044..2789e1dbd605 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -41,6 +41,7 @@
#include <asm/siginfo.h>
#include <asm/debug.h>
#include <asm/kup.h>
+#include <asm/inst.h>
/*
* Check whether the instruction inst is a store using
@@ -52,7 +53,7 @@ static bool store_updates_sp(unsigned int inst)
if (((ppc_inst_val(inst) >> 16) & 0x1f) != 1)
return false;
/* check major opcode */
- switch (inst >> 26) {
+ switch (ppc_inst_primary_opcode(inst)) {
case OP_STWU:
case OP_STBU:
case OP_STHU:
--
2.17.1
next prev parent reply other threads:[~2020-04-28 2:17 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-28 1:57 [PATCH v6 00/28] Initial Prefixed Instruction support Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 01/28] powerpc/xmon: Remove store_inst() for patch_instruction() Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 02/28] powerpc/xmon: Move breakpoint instructions to own array Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 03/28] powerpc/xmon: Move breakpoints to text section Jordan Niethe
2020-04-28 5:19 ` Christophe Leroy
2020-04-28 5:30 ` Jordan Niethe
2020-04-28 5:36 ` Christophe Leroy
2020-04-29 2:45 ` Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 04/28] powerpc/xmon: Use bitwise calculations in_breakpoint_table() Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 05/28] powerpc: Change calling convention for create_branch() et. al Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 06/28] powerpc: Use a macro for creating instructions from u32s Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 07/28] powerpc: Use an accessor for instructions Jordan Niethe
2020-04-28 1:57 ` Jordan Niethe [this message]
2020-04-28 1:57 ` [PATCH v6 09/28] powerpc: Use a function for byte swapping instructions Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 10/28] powerpc: Introduce functions for instruction equality Jordan Niethe
2020-04-29 1:59 ` Alistair Popple
2020-04-29 2:52 ` Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 11/28] powerpc: Use a datatype for instructions Jordan Niethe
2020-04-29 2:02 ` Alistair Popple
2020-04-29 2:57 ` Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 12/28] powerpc: Use a function for reading instructions Jordan Niethe
2020-04-28 1:57 ` [PATCH v6 13/28] powerpc: Add a probe_user_read_inst() function Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 14/28] powerpc: Add a probe_kernel_read_inst() function Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 15/28] powerpc/kprobes: Use patch_instruction() Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 16/28] powerpc: Define and use __get_user_instr{, inatomic}() Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 17/28] powerpc: Introduce a function for reporting instruction length Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 18/28] powerpc/xmon: Use a function for reading instructions Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 19/28] powerpc/xmon: Move insertion of breakpoint for xol'ing Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 20/28] powerpc: Make test_translate_branch() independent of instruction length Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 21/28] powerpc: Enable Prefixed Instructions Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 22/28] powerpc: Define new SRR1 bits for a future ISA version Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 23/28] powerpc: Add prefixed instructions to instruction data type Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 24/28] powerpc: Test prefixed code patching Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 25/28] powerpc: Test prefixed instructions in feature fixups Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 26/28] powerpc: Support prefixed instructions in alignment handler Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 27/28] powerpc sstep: Add support for prefixed load/stores Jordan Niethe
2020-04-28 1:58 ` [PATCH v6 28/28] powerpc sstep: Add support for prefixed fixed-point arithmetic Jordan Niethe
2020-04-28 10:06 ` [PATCH v6 00/28] Initial Prefixed Instruction support Balamuruhan S
2020-04-29 2:51 ` Jordan Niethe
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