From: Alistair Popple <alistair@popple.id.au>
To: mpe@ellerman.id.au
Cc: mikey@neuling.org, aneesh.kumar@linux.ibm.com, clg@kaod.org,
Alistair Popple <alistair@popple.id.au>,
linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 1/4] powerpc: Add new HWCAP bits
Date: Tue, 12 May 2020 21:36:11 +1000 [thread overview]
Message-ID: <20200512113614.28169-2-alistair@popple.id.au> (raw)
In-Reply-To: <20200512113614.28169-1-alistair@popple.id.au>
Two new future architectural features requiring HWCAP bits are being
developed. Once allocated in the kernel firmware can enable these via
device tree cpu features.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
---
arch/powerpc/include/uapi/asm/cputable.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/include/uapi/asm/cputable.h b/arch/powerpc/include/uapi/asm/cputable.h
index 540592034740..2692a56bf20b 100644
--- a/arch/powerpc/include/uapi/asm/cputable.h
+++ b/arch/powerpc/include/uapi/asm/cputable.h
@@ -50,6 +50,8 @@
#define PPC_FEATURE2_DARN 0x00200000 /* darn random number insn */
#define PPC_FEATURE2_SCV 0x00100000 /* scv syscall */
#define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 /* TM w/out suspended state */
+#define PPC_FEATURE2_ARCH_3_1 0x00040000 /* ISA 3.1 */
+#define PPC_FEATURE2_MMA 0x00020000 /* Matrix Multiply Accumulate */
/*
* IMPORTANT!
--
2.20.1
next prev parent reply other threads:[~2020-05-12 11:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-12 11:36 [PATCH 0/4] Base support for POWER10 Alistair Popple
2020-05-12 11:36 ` Alistair Popple [this message]
2020-05-12 11:36 ` [PATCH 2/4] powerpc: Add base support for ISA v3.1 Alistair Popple
2020-05-12 11:36 ` [PATCH 3/4] powerpc/dt_cpu_ftrs: Advertise support for ISA v3.1 if selected Alistair Popple
2020-05-12 11:36 ` [PATCH 4/4] powerpc: Add POWER10 architected mode Alistair Popple
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