From: Madhavan Srinivasan <maddy@linux.ibm.com>
To: mpe@ellerman.id.au
Cc: atrajeev@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org,
Madhavan Srinivasan <maddy@linux.ibm.com>
Subject: [PATCH 3/5] powerpc/perf: Use the address from SIAR register to set cpumode flags
Date: Wed, 21 Oct 2020 14:23:27 +0530 [thread overview]
Message-ID: <20201021085329.384535-3-maddy@linux.ibm.com> (raw)
In-Reply-To: <20201021085329.384535-1-maddy@linux.ibm.com>
From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
While setting the processor mode for any sample, `perf_get_misc_flags`
expects the privilege level to differentiate the userspace and kernel
address. On power10 DD1, there is an issue that causes [MSR_HV MSR_PR] bits
of Sampled Instruction Event Register (SIER) not to be set for marked
events. Hence add a check to use the address in Sampled Instruction Address
Register (SIAR) to identify the privilege level.
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 3b62dbb94796..6be0349e01ad 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -250,10 +250,24 @@ static inline u32 perf_flags_from_msr(struct pt_regs *regs)
static inline u32 perf_get_misc_flags(struct pt_regs *regs)
{
bool use_siar = regs_use_siar(regs);
+ unsigned long mmcra = regs->dsisr;
+ int marked = mmcra & MMCRA_SAMPLE_ENABLE;
if (!use_siar)
return perf_flags_from_msr(regs);
+ /*
+ * Check the address in SIAR to identify the
+ * privilege levels since the SIER[MSR_HV, MSR_PR]
+ * bits are not set for marked events in power10
+ * DD1.
+ */
+ if (marked && (ppmu->flags & PPMU_P10_DD1)) {
+ if (is_kernel_addr(mfspr(SPRN_SIAR)))
+ return PERF_RECORD_MISC_KERNEL;
+ return PERF_RECORD_MISC_USER;
+ }
+
/*
* If we don't have flags in MMCRA, rather than using
* the MSR, we intuit the flags from the address in
--
2.26.2
next prev parent reply other threads:[~2020-10-21 9:02 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-21 8:53 [PATCH 1/5] powerpc/perf: Add new power pmu flag "PPMU_P10_DD1" for power10 DD1 Madhavan Srinivasan
2020-10-21 8:53 ` [PATCH v2 2/5] powerpc/perf: Drop the check for SIAR_VALID Madhavan Srinivasan
2020-10-21 8:53 ` Madhavan Srinivasan [this message]
2020-10-21 8:53 ` [PATCH 4/5] powerpc/perf: Exclude kernel samples while counting events in user space Madhavan Srinivasan
2020-10-21 8:53 ` [PATCH 5/5] powerpc/perf: use regs->nip when siar is zero Madhavan Srinivasan
2020-10-21 9:13 ` Christophe Leroy
2020-10-22 1:25 ` Michael Ellerman
2020-10-27 2:31 ` Madhavan Srinivasan
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