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From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	linux-pci@vger.kernel.org,
	Binghui Wang <wangbinghui@hisilicon.com>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	linux-tegra@vger.kernel.org,
	Thierry Reding <thierry.reding@gmail.com>,
	linux-arm-kernel@axis.com,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Jonathan Chocron <jonnyc@amazon.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Fabio Estevam <festevam@gmail.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	linux-samsung-soc@vger.kernel.org,
	Minghuan Lian <minghuan.Lian@nxp.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Kukjin Kim <kgene@kernel.org>, NXP Linux Team <linux-imx@nxp.com>,
	Xiaowei Song <songxiaowei@hisilicon.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-arm-msm@vger.kernel.org,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Yue Wang <yue.wang@Amlogic.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-amlogic@lists.infradead.org, linux-omap@vger.kernel.org,
	Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	Jingoo Han <jingoohan1@gmail.com>, Andy Gross <agross@kernel.org>,
	Stanimir Varbanov <svarbanov@mm-sol.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	linuxppc-dev@lists.ozlabs.org,
	Lucas Stach <l.stach@pengutronix.de>
Subject: [PATCH 05/13] PCI: dwc: Ensure all outbound ATU windows are reset
Date: Wed, 28 Oct 2020 15:46:38 -0500	[thread overview]
Message-ID: <20201028204646.356535-6-robh@kernel.org> (raw)
In-Reply-To: <20201028204646.356535-1-robh@kernel.org>

The Layerscape driver clears the ATU registers which may have been
configured by the bootloader. Any driver could have the same issue
and doing it for all drivers doesn't hurt, so let's move it into the
common DWC code.

Cc: Minghuan Lian <minghuan.Lian@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Roy Zang <roy.zang@nxp.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/pci/controller/dwc/pci-layerscape.c       | 14 --------------
 drivers/pci/controller/dwc/pcie-designware-host.c |  5 +++++
 2 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c
index f24f79a70d9a..53e56d54c482 100644
--- a/drivers/pci/controller/dwc/pci-layerscape.c
+++ b/drivers/pci/controller/dwc/pci-layerscape.c
@@ -83,14 +83,6 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
 	iowrite32(val, pci->dbi_base + PCIE_STRFMR1);
 }
 
-static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie)
-{
-	int i;
-
-	for (i = 0; i < PCIE_IATU_NUM; i++)
-		dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND);
-}
-
 static int ls1021_pcie_link_up(struct dw_pcie *pci)
 {
 	u32 state;
@@ -136,12 +128,6 @@ static int ls_pcie_host_init(struct pcie_port *pp)
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 	struct ls_pcie *pcie = to_ls_pcie(pci);
 
-	/*
-	 * Disable outbound windows configured by the bootloader to avoid
-	 * one transaction hitting multiple outbound windows.
-	 * dw_pcie_setup_rc() will reconfigure the outbound windows.
-	 */
-	ls_pcie_disable_outbound_atus(pcie);
 	ls_pcie_fix_error_response(pcie);
 
 	dw_pcie_dbi_ro_wr_en(pci);
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index cde45b2076ee..265a48f1a0ae 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -534,6 +534,7 @@ static struct pci_ops dw_pcie_ops = {
 
 void dw_pcie_setup_rc(struct pcie_port *pp)
 {
+	int i;
 	u32 val, ctrl, num_ctrls;
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 
@@ -583,6 +584,10 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
 		PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
 	dw_pcie_writel_dbi(pci, PCI_COMMAND, val);
 
+	/* Ensure all outbound windows are disabled so there are multiple matches */
+	for (i = 0; i < pci->num_viewport; i++)
+		dw_pcie_disable_atu(pci, i, DW_PCIE_REGION_OUTBOUND);
+
 	/*
 	 * If the platform provides its own child bus config accesses, it means
 	 * the platform uses its own address translation component rather than
-- 
2.25.1


  parent reply	other threads:[~2020-10-28 20:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-28 20:46 [PATCH 00/13] PCI: dwc: Another round of clean-ups Rob Herring
2020-10-28 20:46 ` [PATCH 01/13] PCI: dwc/imx6: Drop setting PCI_MSI_FLAGS_ENABLE Rob Herring
2020-10-29  0:21   ` Michael Ellerman
2020-10-29 13:01     ` Rob Herring
2020-10-28 20:46 ` [PATCH 02/13] PCI: dwc/intel-gw: Move ATU offset out of driver match data Rob Herring
2020-10-28 20:46 ` [PATCH 03/13] PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code Rob Herring
2020-10-29 22:09   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 04/13] PCI: dwc/intel-gw: Remove some unneeded function wrappers Rob Herring
2020-10-28 20:46 ` Rob Herring [this message]
2020-10-29 22:12   ` [PATCH 05/13] PCI: dwc: Ensure all outbound ATU windows are reset Jingoo Han
2020-10-28 20:46 ` [PATCH 06/13] PCI: dwc/dra7xx: Use the common MSI irq_chip Rob Herring
2020-10-28 20:46 ` [PATCH 07/13] PCI: dwc: Drop the .set_num_vectors() host op Rob Herring
2020-10-29 22:15   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 08/13] PCI: dwc: Move MSI interrupt setup into DWC common code Rob Herring
2020-10-29 22:18   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 09/13] PCI: dwc: Rework MSI initialization Rob Herring
2020-10-29 22:20   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 10/13] PCI: dwc: Move link handling into common code Rob Herring
2020-10-29 22:24   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 11/13] PCI: dwc: Move dw_pcie_msi_init() into core Rob Herring
2020-10-29 22:26   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 12/13] PCI: dwc: Move dw_pcie_setup_rc() to DWC common code Rob Herring
2020-10-29 22:29   ` Jingoo Han
2020-10-28 20:46 ` [PATCH 13/13] PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init() Rob Herring

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