From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Neil Armstrong <narmstrong@baylibre.com>,
linux-pci@vger.kernel.org,
Binghui Wang <wangbinghui@hisilicon.com>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
linux-tegra@vger.kernel.org,
Thierry Reding <thierry.reding@gmail.com>,
linux-arm-kernel@axis.com,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Jonathan Chocron <jonnyc@amazon.com>,
Shawn Guo <shawnguo@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Fabio Estevam <festevam@gmail.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Jesper Nilsson <jesper.nilsson@axis.com>,
linux-samsung-soc@vger.kernel.org,
Minghuan Lian <minghuan.Lian@nxp.com>,
Kevin Hilman <khilman@baylibre.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Kukjin Kim <kgene@kernel.org>, Mingkai Hu <mingkai.hu@nxp.com>,
Xiaowei Song <songxiaowei@hisilicon.com>,
Marek Szyprowski <m.szyprowski@samsung.com>,
NXP Linux Team <linux-imx@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-arm-msm@vger.kernel.org,
Sascha Hauer <s.hauer@pengutronix.de>,
Yue Wang <yue.wang@Amlogic.com>,
Murali Karicheri <m-karicheri2@ti.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-amlogic@lists.infradead.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Roy Zang <roy.zang@nxp.com>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Jingoo Han <jingoohan1@gmail.com>, Andy Gross <agross@kernel.org>,
Vidya Sagar <vidyas@nvidia.com>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
linuxppc-dev@lists.ozlabs.org,
Lucas Stach <l.stach@pengutronix.de>
Subject: [PATCH v2 00/16] PCI: dwc: Another round of clean-ups
Date: Thu, 5 Nov 2020 15:11:43 -0600 [thread overview]
Message-ID: <20201105211159.1814485-1-robh@kernel.org> (raw)
Here's another batch of DWC PCI host refactoring. This series primarily
moves more of the MSI, link up, and resource handling to the core
code. Beyond a couple of minor fixes, new in this version is runtime
detection of iATU regions instead of using DT properties.
No doubt I've probably broken something. Please test. I've run this thru
kernelci and checked boards with DWC PCI which currently is just
Layerscape boards (hint: add boards and/or enable PCI). A git branch is
here[1].
This is dependent on "PCI: dwc: Restore ATU memory resource setup to use
last entry" which will be in v5.10-rc3.
Rob
[1] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git pci-more-dwc-cleanup
Rob Herring (16):
PCI: dwc: Support multiple ATU memory regions
PCI: dwc/intel-gw: Move ATU offset out of driver match data
PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into
common code
PCI: dwc/intel-gw: Remove some unneeded function wrappers
PCI: dwc: Ensure all outbound ATU windows are reset
PCI: dwc/dra7xx: Use the common MSI irq_chip
PCI: dwc: Drop the .set_num_vectors() host op
PCI: dwc: Move MSI interrupt setup into DWC common code
PCI: dwc: Rework MSI initialization
PCI: dwc: Move link handling into common code
PCI: dwc: Move dw_pcie_msi_init() into core
PCI: dwc: Move dw_pcie_setup_rc() to DWC common code
PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init()
Revert "PCI: dwc/keystone: Drop duplicated 'num-viewport'"
PCI: dwc: Move inbound and outbound windows to common struct
PCI: dwc: Detect number of iATU windows
drivers/pci/controller/dwc/pci-dra7xx.c | 141 +-----------------
drivers/pci/controller/dwc/pci-exynos.c | 50 ++-----
drivers/pci/controller/dwc/pci-imx6.c | 39 +----
drivers/pci/controller/dwc/pci-keystone.c | 79 ++--------
.../pci/controller/dwc/pci-layerscape-ep.c | 37 +----
drivers/pci/controller/dwc/pci-layerscape.c | 67 +--------
drivers/pci/controller/dwc/pci-meson.c | 53 ++-----
drivers/pci/controller/dwc/pcie-al.c | 29 +---
drivers/pci/controller/dwc/pcie-armada8k.c | 37 ++---
drivers/pci/controller/dwc/pcie-artpec6.c | 76 +---------
.../pci/controller/dwc/pcie-designware-ep.c | 58 +++----
.../pci/controller/dwc/pcie-designware-host.c | 139 ++++++++++-------
.../pci/controller/dwc/pcie-designware-plat.c | 70 +--------
drivers/pci/controller/dwc/pcie-designware.c | 93 +++++++++++-
drivers/pci/controller/dwc/pcie-designware.h | 24 +--
drivers/pci/controller/dwc/pcie-histb.c | 37 ++---
drivers/pci/controller/dwc/pcie-intel-gw.c | 67 ++-------
drivers/pci/controller/dwc/pcie-kirin.c | 62 +-------
drivers/pci/controller/dwc/pcie-qcom.c | 38 +----
drivers/pci/controller/dwc/pcie-spear13xx.c | 62 +++-----
drivers/pci/controller/dwc/pcie-tegra194.c | 41 +----
drivers/pci/controller/dwc/pcie-uniphier-ep.c | 38 +----
drivers/pci/controller/dwc/pcie-uniphier.c | 51 +------
23 files changed, 356 insertions(+), 1032 deletions(-)
--
2.25.1
next reply other threads:[~2020-11-05 21:14 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20201105211208eucas1p29087cdd73805e670aff9f3a43f644e05@eucas1p2.samsung.com>
2020-11-05 21:11 ` Rob Herring [this message]
2020-11-05 21:11 ` [PATCH v2 03/16] PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code Rob Herring
2020-11-05 21:11 ` [PATCH v2 05/16] PCI: dwc: Ensure all outbound ATU windows are reset Rob Herring
2020-11-05 21:11 ` [PATCH v2 09/16] PCI: dwc: Rework MSI initialization Rob Herring
2020-11-09 2:53 ` Jisheng Zhang
2020-11-05 21:11 ` [PATCH v2 12/16] PCI: dwc: Move dw_pcie_setup_rc() to DWC common code Rob Herring
2020-11-05 21:11 ` [PATCH v2 13/16] PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init() Rob Herring
2020-11-06 9:17 ` [PATCH v2 00/16] PCI: dwc: Another round of clean-ups Marek Szyprowski
2020-11-19 11:01 ` Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201105211159.1814485-1-robh@kernel.org \
--to=robh@kernel.org \
--cc=agross@kernel.org \
--cc=bhelgaas@google.com \
--cc=bjorn.andersson@linaro.org \
--cc=festevam@gmail.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=hayashi.kunihiko@socionext.com \
--cc=hongxing.zhu@nxp.com \
--cc=jbrunet@baylibre.com \
--cc=jesper.nilsson@axis.com \
--cc=jingoohan1@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=jonnyc@amazon.com \
--cc=kernel@pengutronix.de \
--cc=kgene@kernel.org \
--cc=khilman@baylibre.com \
--cc=kishon@ti.com \
--cc=krzk@kernel.org \
--cc=l.stach@pengutronix.de \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@axis.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-imx@nxp.com \
--cc=linux-omap@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=m-karicheri2@ti.com \
--cc=m.szyprowski@samsung.com \
--cc=martin.blumenstingl@googlemail.com \
--cc=minghuan.Lian@nxp.com \
--cc=mingkai.hu@nxp.com \
--cc=narmstrong@baylibre.com \
--cc=pratyush.anand@gmail.com \
--cc=roy.zang@nxp.com \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
--cc=songxiaowei@hisilicon.com \
--cc=svarbanov@mm-sol.com \
--cc=thierry.reding@gmail.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=vidyas@nvidia.com \
--cc=wangbinghui@hisilicon.com \
--cc=yamada.masahiro@socionext.com \
--cc=yue.wang@Amlogic.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).