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Fri, 16 Apr 2021 16:57:17 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 79C4A4C046; Fri, 16 Apr 2021 16:57:15 +0000 (GMT) Received: from linux.vnet.ibm.com (unknown [9.126.150.29]) by d06av22.portsmouth.uk.ibm.com (Postfix) with SMTP; Fri, 16 Apr 2021 16:57:15 +0000 (GMT) Date: Fri, 16 Apr 2021 22:27:14 +0530 From: Srikar Dronamraju To: Gautham R Shenoy Subject: Re: [PATCH 3/3] powerpc/smp: Cache CPU to chip lookup Message-ID: <20210416165714.GG2633526@linux.vnet.ibm.com> References: <20210415120934.232271-1-srikar@linux.vnet.ibm.com> <20210415120934.232271-4-srikar@linux.vnet.ibm.com> <20210415171921.GB16351@in.ibm.com> <20210415175110.GE2633526@linux.vnet.ibm.com> <20210416155748.GA26496@in.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <20210416155748.GA26496@in.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 8bp4HaOlLpK87NpjPmEm9_9qTCrb9y8L X-Proofpoint-GUID: X4gHH-xksQmxB6DAc_s7gGb323e9WAJc X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-16_08:2021-04-16, 2021-04-16 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 phishscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104160119 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Srikar Dronamraju Cc: Nathan Lynch , Peter Zijlstra , Daniel Henrique Barboza , Valentin Schneider , qemu-ppc@nongnu.org, Cedric Le Goater , linuxppc-dev , Ingo Molnar , David Gibson Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" * Gautham R Shenoy [2021-04-16 21:27:48]: > On Thu, Apr 15, 2021 at 11:21:10PM +0530, Srikar Dronamraju wrote: > > * Gautham R Shenoy [2021-04-15 22:49:21]: > > > > > > > > > > +int *chip_id_lookup_table; > > > > + > > > > #ifdef CONFIG_PPC64 > > > > int __initdata iommu_is_off; > > > > int __initdata iommu_force_on; > > > > @@ -914,13 +916,22 @@ EXPORT_SYMBOL(of_get_ibm_chip_id); > > > > int cpu_to_chip_id(int cpu) > > > > { > > > > struct device_node *np; > > > > + int ret = -1, idx; > > > > + > > > > + idx = cpu / threads_per_core; > > > > + if (chip_id_lookup_table && chip_id_lookup_table[idx] != -1) > > > > > > > > The value -1 is ambiguous since we won't be able to determine if > > > it is because we haven't yet made a of_get_ibm_chip_id() call > > > or if of_get_ibm_chip_id() call was made and it returned a -1. > > > > > > > We don't allocate chip_id_lookup_table unless cpu_to_chip_id() return > > !-1 value for the boot-cpuid. So this ensures that we dont > > unnecessarily allocate chip_id_lookup_table. Also I check for > > chip_id_lookup_table before calling cpu_to_chip_id() for other CPUs. > > So this avoids overhead of calling cpu_to_chip_id() for platforms that > > dont support it. Also its most likely that if the > > chip_id_lookup_table is initialized then of_get_ibm_chip_id() call > > would return a valid value. > > > > + Below we are only populating the lookup table, only when the > > of_get_cpu_node is valid. > > > > So I dont see any drawbacks of initializing it to -1. Do you see > any? > > > Only if other callers of cpu_to_chip_id() don't check for whether the > chip_id_lookup_table() has been allocated or not. From a code > readability point of view, it is easier to have that check this inside > cpu_to_chip_id() instead of requiring all its callers to make that > check. > I didn't understand your comment. However let me reiterate what I said earlier. We don't have control over who and when cpu_to_chip_id() gets called. If the cpu_to_chip_id() might be called for non present CPU, in which case it will return -1, Should we cache it or not? If we cache it, we will return wrong value when the CPU may turn out to be present. If we cache and retry it then having one value for initializing and another for invalid is all the same as having just 1 value for initializing and invalid. Just that we end up adding more confusing code. Atleast to me, code isnt readable if I say retry for -1 and -2 too. After few years, we ourselves will wonder why we have two values if we are checking and performing same actions. > > > > > Thus, perhaps we can initialize chip_id_lookup_table[idx] with a > > > different unique negative value. How about S32_MIN ? and check > > > chip_id_lookup_table[idx] is different here ? > > > > > > > I had initially initialized to -2, But then I thought we adding in > > more confusion than necessary and it was not solving any issues. > > > > > > -- > > Thanks and Regards > > Srikar Dronamraju -- Thanks and Regards Srikar Dronamraju