From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93D42C433FE for ; Mon, 18 Oct 2021 13:30:42 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A3C7613AB for ; Mon, 18 Oct 2021 13:30:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1A3C7613AB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HXyS03Jw9z2yxT for ; Tue, 19 Oct 2021 00:30:40 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=arm.com (client-ip=217.140.110.172; helo=foss.arm.com; envelope-from=sudeep.holla@arm.com; receiver=) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lists.ozlabs.org (Postfix) with ESMTP id 4HXyRW5bPTz2xXd for ; Tue, 19 Oct 2021 00:30:14 +1100 (AEDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 967F8113E; Mon, 18 Oct 2021 06:30:13 -0700 (PDT) Received: from bogus (unknown [10.57.25.56]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A02F3F73D; Mon, 18 Oct 2021 06:30:06 -0700 (PDT) Date: Mon, 18 Oct 2021 14:30:04 +0100 From: Sudeep Holla To: Rob Herring Subject: Re: [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id' Message-ID: <20211018133004.7pcbfdsvrjgjitpj@bogus> References: <20211006164332.1981454-1-robh@kernel.org> <20211006164332.1981454-12-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211006164332.1981454-12-robh@kernel.org> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rich Felker , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Guo Ren , "H. Peter Anvin" , linux-riscv@lists.infradead.org, Will Deacon , Thomas Gleixner , Jonas Bonn , Florian Fainelli , Yoshinori Sato , linux-sh@vger.kernel.org, x86@kernel.org, Russell King , linux-csky@vger.kernel.org, Ingo Molnar , bcm-kernel-feedback-list@broadcom.com, Catalin Marinas , Palmer Dabbelt , devicetree@vger.kernel.org, Albert Ou , Ray Jui , Stefan Kristiansson , openrisc@lists.librecores.org, Borislav Petkov , Paul Walmsley , Stafford Horne , linux-arm-kernel@lists.infradead.org, Scott Branden , Greg Kroah-Hartman , Frank Rowand , James Morse , Sudeep Holla , Paul Mackerras , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Oct 06, 2021 at 11:43:31AM -0500, Rob Herring wrote: > In preparation to set the cache 'id' based on the CPU h/w ids, allow for > 64-bit bit 'id' value. The only case that needs this is arm64, so > unsigned long is sufficient. > Reviewed-by: Sudeep Holla -- Regards, Sudeep