From: Chen Zhongjin <chenzhongjin@huawei.com>
To: <linux-kernel@vger.kernel.org>, <linux-arch@vger.kernel.org>,
<linuxppc-dev@lists.ozlabs.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kbuild@vger.kernel.org>, <live-patching@vger.kernel.org>
Cc: mark.rutland@arm.com, madvenka@linux.microsoft.com,
michal.lkml@markovi.net, pasha.tatashin@soleen.com,
peterz@infradead.org, catalin.marinas@arm.com,
masahiroy@kernel.org, ndesaulniers@google.com,
chenzhongjin@huawei.com, rmk+kernel@armlinux.org.uk,
broonie@kernel.org, will@kernel.org, jpoimboe@kernel.org
Subject: [PATCH v5 07/33] objtool: arm64: Decode LDR instructions
Date: Wed, 22 Jun 2022 23:48:54 +0800 [thread overview]
Message-ID: <20220622154920.95075-8-chenzhongjin@huawei.com> (raw)
In-Reply-To: <20220622154920.95075-1-chenzhongjin@huawei.com>
Load literal instructions can generate constants inside code sections.
Record the locations of the constants in order to be able to remove
their corresponding "struct instruction".
Signed-off-by: Julien Thierry <jthierry@redhat.com>
Signed-off-by: Chen Zhongjin <chenzhongjin@huawei.com>
---
tools/objtool/arch/arm64/decode.c | 87 +++++++++++++++++++++++++++-
tools/objtool/arch/x86/decode.c | 5 ++
tools/objtool/check.c | 3 +
tools/objtool/include/objtool/arch.h | 2 +
4 files changed, 96 insertions(+), 1 deletion(-)
diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c
index c8d50d041889..9bdd59e0d11d 100644
--- a/tools/objtool/arch/arm64/decode.c
+++ b/tools/objtool/arch/arm64/decode.c
@@ -31,6 +31,64 @@ static unsigned long sign_extend(unsigned long x, int nbits)
return ((~0UL + (sign_bit ^ 1)) << nbits) | x;
}
+struct insn_loc {
+ const struct section *sec;
+ unsigned long offset;
+ struct hlist_node hnode;
+};
+
+DEFINE_HASHTABLE(invalid_insns, 16);
+
+static int record_invalid_insn(const struct section *sec,
+ unsigned long offset)
+{
+ struct insn_loc *loc;
+ struct hlist_head *l;
+
+ l = &invalid_insns[hash_min(offset, HASH_BITS(invalid_insns))];
+ if (!hlist_empty(l)) {
+ loc = hlist_entry(l->first, struct insn_loc, hnode);
+ return 0;
+ }
+
+ loc = malloc(sizeof(*loc));
+ if (!loc) {
+ WARN("malloc failed");
+ return -1;
+ }
+
+ loc->sec = sec;
+ loc->offset = offset;
+
+ hash_add(invalid_insns, &loc->hnode, loc->offset);
+
+ return 0;
+}
+
+int arch_post_process_instructions(struct objtool_file *file)
+{
+ struct hlist_node *tmp;
+ struct insn_loc *loc;
+ unsigned int bkt;
+ int res = 0;
+
+ hash_for_each_safe(invalid_insns, bkt, tmp, loc, hnode) {
+ struct instruction *insn;
+
+ insn = find_insn(file, (struct section *) loc->sec, loc->offset);
+ if (insn) {
+ list_del(&insn->list);
+ hash_del(&insn->hash);
+ free(insn);
+ }
+
+ hash_del(&loc->hnode);
+ free(loc);
+ }
+
+ return res;
+}
+
bool arch_callee_saved_reg(unsigned char reg)
{
switch (reg) {
@@ -351,7 +409,34 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
break;
case AARCH64_INSN_CLS_LDST:
{
- return decode_load_store(insn, immediate, ops_list);
+ int ret;
+
+ ret = decode_load_store(insn, immediate, ops_list);
+ if (ret <= 0)
+ return ret;
+
+ /*
+ * For LDR ops, assembler can generate the data to be
+ * loaded in the code section
+ * Record and remove these data because they
+ * are never excuted
+ */
+ if (aarch64_insn_is_ldr_lit(insn)) {
+ long pc_offset;
+
+ pc_offset = insn & GENMASK(23, 5);
+ /* Sign extend and multiply by 4 */
+ pc_offset = (pc_offset << (64 - 23));
+ pc_offset = ((pc_offset >> (64 - 23)) >> 5) << 2;
+
+ ret = record_invalid_insn(sec, offset + pc_offset);
+
+ /* 64-bit literal */
+ if (insn & BIT(30))
+ ret = record_invalid_insn(sec, offset + pc_offset + 4);
+
+ return ret;
+ }
break;
}
default:
diff --git a/tools/objtool/arch/x86/decode.c b/tools/objtool/arch/x86/decode.c
index 8b990a52aada..081b5e72f8df 100644
--- a/tools/objtool/arch/x86/decode.c
+++ b/tools/objtool/arch/x86/decode.c
@@ -693,6 +693,11 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
return 0;
}
+int arch_post_process_instructions(struct objtool_file *file)
+{
+ return 0;
+}
+
void arch_initial_func_cfi_state(struct cfi_init_state *state)
{
int i;
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 35d0a1bc4279..c0feb6db7c6d 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -439,6 +439,9 @@ static int decode_instructions(struct objtool_file *file)
if (opts.stats)
printf("nr_insns: %lu\n", nr_insns);
+ if (arch_post_process_instructions(file))
+ return -1;
+
return 0;
err:
diff --git a/tools/objtool/include/objtool/arch.h b/tools/objtool/include/objtool/arch.h
index 9b19cc304195..651262af2655 100644
--- a/tools/objtool/include/objtool/arch.h
+++ b/tools/objtool/include/objtool/arch.h
@@ -77,6 +77,8 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
unsigned long *immediate,
struct list_head *ops_list);
+int arch_post_process_instructions(struct objtool_file *file);
+
bool arch_callee_saved_reg(unsigned char reg);
unsigned long arch_jump_destination(struct instruction *insn);
--
2.17.1
next prev parent reply other threads:[~2022-06-22 15:55 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-22 15:48 [PATCH v5 00/33] objtool: add base support for arm64 Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 01/33] tools: arm64: Make aarch64 instruction decoder available to tools Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 02/33] objtool: arm64: Add base definition for arm64 backend Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 03/33] objtool: arm64: Decode add/sub instructions Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 04/33] objtool: arm64: Decode jump and call related instructions Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 05/33] objtool: arm64: Decode other system instructions Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 06/33] objtool: arm64: Decode load/store instructions Chen Zhongjin
2022-06-22 15:48 ` Chen Zhongjin [this message]
2022-06-22 15:48 ` [PATCH v5 08/33] objtool: arm64: Accept non-instruction data in code sections Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 09/33] objtool: check: Support data in text section Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 10/33] objtool: arm64: Handle supported relocations in alternatives Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 11/33] objtool: arm64: Ignore replacement section for alternative callback Chen Zhongjin
2022-06-22 15:48 ` [PATCH v5 12/33] objtool: arm64: Enable stack validation for arm64 Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 13/33] objtool: arm64: Enable ORC " Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 14/33] objtool: arm64: Add annotate_reachable() for objtools Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 15/33] arm64: bug: Add reachable annotation to warning macros Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 16/33] arm64: kgdb: Add reachable annotation after kgdb brk Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 17/33] objtool: arm64: Add unwind_hint support Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 18/33] arm64: Change symbol type annotations Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 19/33] arm64: Annotate unwind_hint for symbols with empty stack Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 20/33] arm64: entry: Annotate unwind_hint for entry Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 21/33] arm64: kvm: Annotate unwind_hint for hyp entry Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 22/33] arm64: efi-header: Mark efi header as data Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 23/33] arm64: head: Mark constants " Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 24/33] arm64: proc: Mark constant " Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 25/33] arm64: crypto: " Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 26/33] arm64: crypto: Remove unnecessary stackframe Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 27/33] arm64: Set intra-function call annotations Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 28/33] arm64: sleep: Properly set frame pointer before call Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 29/33] arm64: compat: Move VDSO code to .rodata section Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 30/33] arm64: entry: Align stack size for alternative Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 31/33] arm64: kernel: Skip validation of proton-pack.c Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 32/33] arm64: irq-gic: Replace unreachable() with -EINVAL Chen Zhongjin
2022-06-22 15:49 ` [PATCH v5 33/33] objtool: revert c_file fallthrough detection for arm64 Chen Zhongjin
2022-06-22 17:19 ` [PATCH v5 00/33] objtool: add base support " Daniel Thompson
2022-06-23 1:37 ` Chen Zhongjin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220622154920.95075-8-chenzhongjin@huawei.com \
--to=chenzhongjin@huawei.com \
--cc=broonie@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=jpoimboe@kernel.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kbuild@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=live-patching@vger.kernel.org \
--cc=madvenka@linux.microsoft.com \
--cc=mark.rutland@arm.com \
--cc=masahiroy@kernel.org \
--cc=michal.lkml@markovi.net \
--cc=ndesaulniers@google.com \
--cc=pasha.tatashin@soleen.com \
--cc=peterz@infradead.org \
--cc=rmk+kernel@armlinux.org.uk \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).