From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1519C43334 for ; Thu, 23 Jun 2022 01:58:40 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LT3M32h9Sz3g3q for ; Thu, 23 Jun 2022 11:58:39 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=huawei.com (client-ip=45.249.212.255; helo=szxga08-in.huawei.com; envelope-from=chenzhongjin@huawei.com; receiver=) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LT3CH06P9z3cfJ for ; Thu, 23 Jun 2022 11:51:53 +1000 (AEST) Received: from dggpemm500022.china.huawei.com (unknown [172.30.72.55]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4LT38k20bzz1KC8s; Thu, 23 Jun 2022 09:49:42 +0800 (CST) Received: from dggpemm500013.china.huawei.com (7.185.36.172) by dggpemm500022.china.huawei.com (7.185.36.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 23 Jun 2022 09:51:50 +0800 Received: from ubuntu1804.huawei.com (10.67.175.36) by dggpemm500013.china.huawei.com (7.185.36.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 23 Jun 2022 09:51:49 +0800 From: Chen Zhongjin To: , , , , , Subject: [PATCH v6 21/33] arm64: kvm: Annotate unwind_hint for hyp entry Date: Thu, 23 Jun 2022 09:49:05 +0800 Message-ID: <20220623014917.199563-22-chenzhongjin@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623014917.199563-1-chenzhongjin@huawei.com> References: <20220623014917.199563-1-chenzhongjin@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.175.36] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To dggpemm500013.china.huawei.com (7.185.36.172) X-CFilter-Loop: Reflected X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, madvenka@linux.microsoft.com, daniel.thompson@linaro.org, michal.lkml@markovi.net, pasha.tatashin@soleen.com, peterz@infradead.org, catalin.marinas@arm.com, masahiroy@kernel.org, ndesaulniers@google.com, chenzhongjin@huawei.com, rmk+kernel@armlinux.org.uk, broonie@kernel.org, will@kernel.org, jpoimboe@kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Symbol __guest_enter and kvm_hyp_vector saved x0, x1 on stack. Symbol __guest_exit and __guest_exit_panic is reached when resuming EL2 execution, and the previous stack pointer gets restored. Add adequate unwind hints. Signed-off-by: Julien Thierry Signed-off-by: Chen Zhongjin --- arch/arm64/kvm/hyp/entry.S | 5 +++++ arch/arm64/kvm/hyp/hyp-entry.S | 3 +++ 2 files changed, 8 insertions(+) diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S index 045d4481c820..81e30d56bf28 100644 --- a/arch/arm64/kvm/hyp/entry.S +++ b/arch/arm64/kvm/hyp/entry.S @@ -15,6 +15,7 @@ #include #include #include +#include .text @@ -22,6 +23,7 @@ * u64 __guest_enter(struct kvm_vcpu *vcpu); */ SYM_CODE_START(__guest_enter) + UNWIND_HINT_FUNC // x0: vcpu // x1-x17: clobbered by macros // x29: guest context @@ -88,6 +90,7 @@ SYM_INNER_LABEL(__guest_exit_panic, SYM_L_GLOBAL) // vcpu x0-x1 on the stack // If the hyp context is loaded, go straight to hyp_panic + UNWIND_HINT_FUNC get_loaded_vcpu x0, x1 cbnz x0, 1f b hyp_panic @@ -110,6 +113,7 @@ SYM_INNER_LABEL(__guest_exit, SYM_L_GLOBAL) // x1: vcpu // x2-x29,lr: vcpu regs // vcpu x0-x1 on the stack + UNWIND_HINT_FUNC sp_offset=16 add x1, x1, #VCPU_CONTEXT @@ -199,6 +203,7 @@ abort_guest_exit_end: msr daifset, #4 // Mask aborts ret + UNWIND_HINT_FUNC _kvm_extable abort_guest_exit_start, 9997f _kvm_extable abort_guest_exit_end, 9997f 9997: diff --git a/arch/arm64/kvm/hyp/hyp-entry.S b/arch/arm64/kvm/hyp/hyp-entry.S index 4a65262a4f3a..d72143c59707 100644 --- a/arch/arm64/kvm/hyp/hyp-entry.S +++ b/arch/arm64/kvm/hyp/hyp-entry.S @@ -151,6 +151,7 @@ SYM_CODE_END(\label) .macro valid_vect target .align 7 + UNWIND_HINT_FUNC 661: esb stp x0, x1, [sp, #-16]! @@ -162,6 +163,7 @@ check_preamble_length 661b, 662b .macro invalid_vect target .align 7 + UNWIND_HINT_FUNC 661: nop stp x0, x1, [sp, #-16]! @@ -209,6 +211,7 @@ SYM_CODE_END(__kvm_hyp_vector) .macro hyp_ventry indirect, spectrev2 .align 7 1: esb + UNWIND_HINT_FUNC .if \spectrev2 != 0 spectrev2_smccc_wa1_smc .else -- 2.17.1