From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EAD45C43334 for ; Thu, 23 Jun 2022 01:59:02 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LT3MT4S9qz3g6x for ; Thu, 23 Jun 2022 11:59:01 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=huawei.com (client-ip=45.249.212.188; helo=szxga02-in.huawei.com; envelope-from=chenzhongjin@huawei.com; receiver=) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LT3CJ0lPWz3cgc for ; Thu, 23 Jun 2022 11:51:56 +1000 (AEST) Received: from dggpemm500020.china.huawei.com (unknown [172.30.72.54]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4LT37J1xxkzShCC; Thu, 23 Jun 2022 09:48:28 +0800 (CST) Received: from dggpemm500013.china.huawei.com (7.185.36.172) by dggpemm500020.china.huawei.com (7.185.36.49) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 23 Jun 2022 09:51:53 +0800 Received: from ubuntu1804.huawei.com (10.67.175.36) by dggpemm500013.china.huawei.com (7.185.36.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 23 Jun 2022 09:51:52 +0800 From: Chen Zhongjin To: , , , , , Subject: [PATCH v6 32/33] arm64: irq-gic: Replace unreachable() with -EINVAL Date: Thu, 23 Jun 2022 09:49:16 +0800 Message-ID: <20220623014917.199563-33-chenzhongjin@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623014917.199563-1-chenzhongjin@huawei.com> References: <20220623014917.199563-1-chenzhongjin@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.175.36] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To dggpemm500013.china.huawei.com (7.185.36.172) X-CFilter-Loop: Reflected X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, madvenka@linux.microsoft.com, daniel.thompson@linaro.org, michal.lkml@markovi.net, pasha.tatashin@soleen.com, peterz@infradead.org, catalin.marinas@arm.com, masahiroy@kernel.org, ndesaulniers@google.com, chenzhongjin@huawei.com, rmk+kernel@armlinux.org.uk, broonie@kernel.org, will@kernel.org, jpoimboe@kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Using unreachable() at default of switch generates an extra branch at end of the function, and compiler won't generate a ret to close this branch because it knows it's unreachable. If there's no instruction in this branch, compiler will generate a NOP, And it will confuse objtool to warn this NOP as a fall through branch. In fact these branches are actually unreachable, so we can replace unreachable() with returning a -EINVAL value. Signed-off-by: Chen Zhongjin --- arch/arm64/kvm/hyp/vgic-v3-sr.c | 7 +++---- drivers/irqchip/irq-gic-v3.c | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c index 4fb419f7b8b6..f3cee92c3038 100644 --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c @@ -6,7 +6,6 @@ #include -#include #include #include @@ -55,7 +54,7 @@ static u64 __gic_v3_get_lr(unsigned int lr) return read_gicreg(ICH_LR15_EL2); } - unreachable(); + return -EINVAL; } static void __gic_v3_set_lr(u64 val, int lr) @@ -166,7 +165,7 @@ static u32 __vgic_v3_read_ap0rn(int n) val = read_gicreg(ICH_AP0R3_EL2); break; default: - unreachable(); + val = -EINVAL; } return val; @@ -190,7 +189,7 @@ static u32 __vgic_v3_read_ap1rn(int n) val = read_gicreg(ICH_AP1R3_EL2); break; default: - unreachable(); + val = -EINVAL; } return val; diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index b252d5534547..2ef98e32d257 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -475,7 +475,7 @@ static u32 __gic_get_ppi_index(irq_hw_number_t hwirq) case EPPI_RANGE: return hwirq - EPPI_BASE_INTID + 16; default: - unreachable(); + return -EINVAL; } } -- 2.17.1