From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C247CC32771 for ; Wed, 17 Aug 2022 16:40:41 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4M7DKN00X9z3cdq for ; Thu, 18 Aug 2022 02:40:40 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=ccHNnbQF; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=2604:1380:4641:c500::1; helo=dfw.source.kernel.org; envelope-from=pali@kernel.org; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=ccHNnbQF; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4M7DJg13DMz3bTZ for ; Thu, 18 Aug 2022 02:40:03 +1000 (AEST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 781EB60DDC; Wed, 17 Aug 2022 16:40:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2407EC433B5; Wed, 17 Aug 2022 16:40:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660754400; bh=KkrryIdY2Ve2bs/hZ2Z+dNgS3oYZRsAd1ewH2lCViO4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ccHNnbQFFsiz0tKZO71G5O4EaOl5jPLSluev94WXkiV1n/59tcsJQupsH/KTSIRJx bnwZBufeC0bKvFx08encF69lxLVAytblB3TNtZK7gvAxNApy+MF1UJPbxkgiJOeQqJ wCN0sGAYyhkIs4xSTl3ysjQt1eR1DWf903lOSNohBl36qv06RN0eAThuJmIE5cxwMz riHFym1D7iKGLDCllrDhKlwbS6ymbAAm/mFjOA03Kx5Veh0cS6vgi70bY+OggHk73X h0MRrHQ0p6C5Acj31iSLe9QwuXwRAdvmUQCPVzWoRkFs2ft6xwn2JNchlypP2lMOE3 LpoZi9djjVPdA== Received: by pali.im (Postfix) id C67F42799; Wed, 17 Aug 2022 18:39:57 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras Subject: [PATCH 2/2] powerpc/pci: Enable PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT by default Date: Wed, 17 Aug 2022 18:39:27 +0200 Message-Id: <20220817163927.24453-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220817163927.24453-1-pali@kernel.org> References: <20220817163927.24453-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" It makes sense to enable CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT by default (when possible by dependencies) to take advantages of all 256 PCI buses on each PCI domain, like it is already on all other kernel architectures. Signed-off-by: Pali Rohár --- arch/powerpc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index df2696c406ad..0905e4807815 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -387,6 +387,7 @@ config PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT depends on PPC32 depends on !PPC_PCI_OF_BUS_MAP_FILL bool "Assign PCI bus numbers from zero individually for each PCI domain" + default y help By default on PPC32 were PCI bus numbers unique across all PCI domains. So system could have only 256 PCI buses independently of available -- 2.20.1