From: Alistair Popple <alistair@popple.id.au>
To: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: linuxppc-dev@lists.ozlabs.org,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Daniel Axtens <dja@axtens.net>,
David Gibson <david@gibson.dropbear.id.au>,
Gavin Shan <gwshan@linux.vnet.ibm.com>,
Paul Mackerras <paulus@samba.org>,
Russell Currey <ruscur@russell.cc>,
Alex Williamson <alex.williamson@redhat.com>
Subject: Re: [PATCH kernel 04/10] powerpc/powernv/npu: TCE Kill helpers cleanup
Date: Mon, 21 Mar 2016 13:51:33 +1100 [thread overview]
Message-ID: <3559497.q44USTMyyK@new-mexico> (raw)
In-Reply-To: <1457504946-40649-5-git-send-email-aik@ozlabs.ru>
On Wed, 9 Mar 2016 17:29:00 Alexey Kardashevskiy wrote:
> NPU PHB TCE Kill register is exactly the same as in the rest of POWER8
> so let's reuse the existing code for NPU. The only bit missing is
> a helper to reset the entire TCE cache so this moves such a helper
> from NPU code and renames it.
>
> Since pnv_npu_tce_invalidate() does really invalidate the entire cache,
> this uses pnv_pci_ioda2_tce_invalidate_entire() directly for NPU.
> This adds an explicit comment for workaround for invalidating NPU TCE
> cache.
>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
> ---
> arch/powerpc/platforms/powernv/npu-dma.c | 41 -------------------------------
> arch/powerpc/platforms/powernv/pci-ioda.c | 29 ++++++++++++++++++----
> arch/powerpc/platforms/powernv/pci.h | 7 +-----
> 3 files changed, 25 insertions(+), 52 deletions(-)
>
> diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c
> index 7229acd..778570c 100644
> --- a/arch/powerpc/platforms/powernv/npu-dma.c
> +++ b/arch/powerpc/platforms/powernv/npu-dma.c
> @@ -25,8 +25,6 @@
> * Other types of TCE cache invalidation are not functional in the
> * hardware.
> */
> -#define TCE_KILL_INVAL_ALL PPC_BIT(0)
> -
> static struct pci_dev *get_pci_dev(struct device_node *dn)
> {
> return PCI_DN(dn)->pcidev;
> @@ -161,45 +159,6 @@ static struct pnv_ioda_pe *get_gpu_pci_dev_and_pe(struct pnv_ioda_pe *npe,
> return pe;
> }
>
> -void pnv_npu_tce_invalidate_entire(struct pnv_ioda_pe *npe)
> -{
> - struct pnv_phb *phb = npe->phb;
> -
> - if (WARN_ON(phb->type != PNV_PHB_NPU ||
> - !phb->ioda.tce_inval_reg ||
> - !(npe->flags & PNV_IODA_PE_DEV)))
> - return;
> -
> - mb(); /* Ensure previous TCE table stores are visible */
> - __raw_writeq(cpu_to_be64(TCE_KILL_INVAL_ALL),
> - phb->ioda.tce_inval_reg);
> -}
> -
> -void pnv_npu_tce_invalidate(struct pnv_ioda_pe *npe,
> - struct iommu_table *tbl,
> - unsigned long index,
> - unsigned long npages,
> - bool rm)
> -{
> - struct pnv_phb *phb = npe->phb;
> -
> - /* We can only invalidate the whole cache on NPU */
> - unsigned long val = TCE_KILL_INVAL_ALL;
> -
> - if (WARN_ON(phb->type != PNV_PHB_NPU ||
> - !phb->ioda.tce_inval_reg ||
> - !(npe->flags & PNV_IODA_PE_DEV)))
> - return;
> -
> - mb(); /* Ensure previous TCE table stores are visible */
> - if (rm)
> - __raw_rm_writeq(cpu_to_be64(val),
> - (__be64 __iomem *) phb->ioda.tce_inval_reg_phys);
> - else
> - __raw_writeq(cpu_to_be64(val),
> - phb->ioda.tce_inval_reg);
> -}
> -
> void pnv_npu_init_dma_pe(struct pnv_ioda_pe *npe)
> {
> struct pnv_ioda_pe *gpe;
> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
> index 33e9489..90cdf49 100644
> --- a/arch/powerpc/platforms/powernv/pci-ioda.c
> +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
> @@ -1824,9 +1824,23 @@ static struct iommu_table_ops pnv_ioda1_iommu_ops = {
> .get = pnv_tce_get,
> };
>
> +#define TCE_KILL_INVAL_ALL PPC_BIT(0)
> #define TCE_KILL_INVAL_PE PPC_BIT(1)
> #define TCE_KILL_INVAL_TCE PPC_BIT(2)
>
> +void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm)
> +{
> + const unsigned long val = TCE_KILL_INVAL_ALL;
> +
> + mb(); /* Ensure previous TCE table stores are visible */
> + if (rm)
> + __raw_rm_writeq(cpu_to_be64(val),
> + (__be64 __iomem *)
> + phb->ioda.tce_inval_reg_phys);
> + else
> + __raw_writeq(cpu_to_be64(val), phb->ioda.tce_inval_reg);
> +}
> +
> static inline void pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe)
> {
> /* 01xb - invalidate TCEs that match the specified PE# */
> @@ -1847,7 +1861,7 @@ static inline void pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe)
> if (!npe || npe->phb->type != PNV_PHB_NPU)
> continue;
>
> - pnv_npu_tce_invalidate_entire(npe);
> + pnv_pci_ioda2_tce_invalidate_entire(npe->phb, false);
> }
> }
>
> @@ -1896,14 +1910,19 @@ static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl,
> index, npages);
>
> if (pe->flags & PNV_IODA_PE_PEER)
> - /* Invalidate PEs using the same TCE table */
> + /*
> + * The NVLink hardware does not support TCE kill
> + * per TCE entry so we have to invalidate
> + * the entire cache for it.
> + */
> for (i = 0; i < PNV_IODA_MAX_PEER_PES; i++) {
> npe = pe->peers[i];
> - if (!npe || npe->phb->type != PNV_PHB_NPU)
> + if (!npe || npe->phb->type != PNV_PHB_NPU ||
> + !npe->phb->ioda.tce_inval_reg)
> continue;
>
> - pnv_npu_tce_invalidate(npe, tbl, index,
> - npages, rm);
> + pnv_pci_ioda2_tce_invalidate_entire(npe->phb,
> + rm);
> }
> }
> }
> diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
> index 3f814f3..0b89a4c 100644
> --- a/arch/powerpc/platforms/powernv/pci.h
> +++ b/arch/powerpc/platforms/powernv/pci.h
> @@ -237,15 +237,10 @@ extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
> extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
>
> /* Nvlink functions */
> -extern void pnv_npu_tce_invalidate_entire(struct pnv_ioda_pe *npe);
> -extern void pnv_npu_tce_invalidate(struct pnv_ioda_pe *npe,
> - struct iommu_table *tbl,
> - unsigned long index,
> - unsigned long npages,
> - bool rm);
> extern void pnv_npu_init_dma_pe(struct pnv_ioda_pe *npe);
> extern void pnv_npu_setup_dma_pe(struct pnv_ioda_pe *npe);
> extern int pnv_npu_dma_set_bypass(struct pnv_ioda_pe *npe, bool enabled);
> extern int pnv_npu_dma_set_mask(struct pci_dev *npdev, u64 dma_mask);
> +extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm);
>
> #endif /* __POWERNV_PCI_H */
>
next prev parent reply other threads:[~2016-03-21 2:51 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-09 6:28 [PATCH kernel 00/10] powerpc/powernv/npu: Enable PCI pass through for NVLink Alexey Kardashevskiy
2016-03-09 6:28 ` [PATCH kernel 01/10] vfio/spapr: Relax the IOMMU compatibility check Alexey Kardashevskiy
2016-03-10 5:35 ` David Gibson
2016-03-09 6:28 ` [PATCH kernel 02/10] powerpc/powernv: Rename pnv_pci_ioda2_tce_invalidate_entire Alexey Kardashevskiy
2016-03-10 5:35 ` David Gibson
2016-03-09 6:28 ` [PATCH kernel 03/10] powerpc/powernv: Define TCE Kill flags Alexey Kardashevskiy
2016-03-10 5:36 ` David Gibson
2016-03-09 6:29 ` [PATCH kernel 04/10] powerpc/powernv/npu: TCE Kill helpers cleanup Alexey Kardashevskiy
2016-03-10 5:42 ` David Gibson
2016-03-21 2:51 ` Alistair Popple [this message]
2016-03-09 6:29 ` [PATCH kernel 05/10] powerpc/powernv/npu: Use the correct IOMMU page size Alexey Kardashevskiy
2016-03-10 5:43 ` David Gibson
2016-03-21 2:57 ` Alistair Popple
2016-03-09 6:29 ` [PATCH kernel 06/10] powerpc/powernv/npu: Simplify DMA setup Alexey Kardashevskiy
2016-03-16 5:55 ` David Gibson
2016-03-21 3:59 ` Alistair Popple
2016-03-09 6:29 ` [PATCH kernel 07/10] powerpc/powernv/npu: Rework TCE Kill handling Alexey Kardashevskiy
2016-03-21 6:50 ` Alistair Popple
2016-03-09 6:29 ` [PATCH kernel 08/10] powerpc/powernv/npu: Add NPU devices to IOMMU group Alexey Kardashevskiy
2016-03-21 4:48 ` David Gibson
2016-03-21 8:25 ` Alexey Kardashevskiy
2016-03-22 0:25 ` David Gibson
2016-03-22 1:48 ` Alexey Kardashevskiy
2016-03-22 12:41 ` Benjamin Herrenschmidt
2016-03-09 6:29 ` [PATCH kernel 09/10] powerpc/powernv/ioda2: Export some helpers Alexey Kardashevskiy
2016-03-09 6:29 ` [PATCH kernel 10/10] powerpc/powernv/npu: Enable passing through via VFIO Alexey Kardashevskiy
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