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From: Michael Ellerman <>
To: Alexey Kardashevskiy <>,
Cc: Sam Bobroff <>,
	Alistair Popple <>,, Alexey Kardashevskiy <>,
	Oliver O'Halloran <>,
	David Gibson <>
Subject: Re: [PATCH kernel v5 1/4] powerpc/powernv/ioda: Fix race in TCE level allocation
Date: Thu, 22 Aug 2019 23:08:55 +1000 (AEST)
Message-ID: <> (raw)
In-Reply-To: <>

On Thu, 2019-07-18 at 05:11:36 UTC, Alexey Kardashevskiy wrote:
> pnv_tce() returns a pointer to a TCE entry and originally a TCE table
> would be pre-allocated. For the default case of 2GB window the table
> needs only a single level and that is fine. However if more levels are
> requested, it is possible to get a race when 2 threads want a pointer
> to a TCE entry from the same page of TCEs.
> This adds cmpxchg to handle the race. Note that once TCE is non-zero,
> it cannot become zero again.
> CC: # v4.19+
> Fixes: a68bd1267b72 ("powerpc/powernv/ioda: Allocate indirect TCE levels on demand")
> Signed-off-by: Alexey Kardashevskiy <>

Series applied to powerpc next, thanks.


  reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-18  5:11 [PATCH kernel v5 0/4] powerpc/ioda2: Yet another attempt to allow DMA masks between 32 and 59 Alexey Kardashevskiy
2019-07-18  5:11 ` [PATCH kernel v5 1/4] powerpc/powernv/ioda: Fix race in TCE level allocation Alexey Kardashevskiy
2019-08-22 13:08   ` Michael Ellerman [this message]
2019-07-18  5:11 ` [PATCH kernel v5 2/4] powerpc/iommu: Allow bypass-only for DMA Alexey Kardashevskiy
2019-07-18  5:11 ` [PATCH kernel v5 3/4] powerpc/powernv/ioda2: Allocate TCE table levels on demand for default DMA window Alexey Kardashevskiy
2019-07-18  5:11 ` [PATCH kernel v5 4/4] powerpc/powernv/ioda2: Create bigger default window with 64k IOMMU pages Alexey Kardashevskiy

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