From: "Maciej S. Szmigiero" <mail@maciej.szmigiero.name>
To: Timur Tabi <timur@tabi.org>
Cc: Fabio Estevam <festevam@gmail.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults
Date: Sun, 17 Jan 2016 02:01:05 +0100 [thread overview]
Message-ID: <569AE7D1.6050607@maciej.szmigiero.name> (raw)
In-Reply-To: <569ADC0D.2000807@tabi.org>
On 17.01.2016 01:10, Timur Tabi wrote:
> Maciej S. Szmigiero wrote:
>> +static const struct regmap_config fsl_ssi_regconfig_imx21 = {
>> + .max_register = CCSR_SSI_SRMSK,
>> + .reg_bits = 32,
>> + .val_bits = 32,
>> + .reg_stride = 4,
>> + .val_format_endian = REGMAP_ENDIAN_NATIVE,
>> + .num_reg_defaults_raw = CCSR_SSI_SRMSK / 4 + 1,
>> + .readable_reg = fsl_ssi_readable_reg,
>> + .volatile_reg = fsl_ssi_volatile_reg,
>> + .precious_reg = fsl_ssi_precious_reg,
>> + .writeable_reg = fsl_ssi_writeable_reg,
>> + .cache_type = REGCACHE_RBTREE,
>> +};
>> +
>> static const struct regmap_config fsl_ssi_regconfig = {
>> .max_register = CCSR_SSI_SACCDIS,
>> .reg_bits = 32,
>> .val_bits = 32,
>> .reg_stride = 4,
>> .val_format_endian = REGMAP_ENDIAN_NATIVE,
>> - .reg_defaults = fsl_ssi_reg_defaults,
>> - .num_reg_defaults = ARRAY_SIZE(fsl_ssi_reg_defaults),
>> + .num_reg_defaults_raw = CCSR_SSI_SACCDIS / 4 + 1,
>> .readable_reg = fsl_ssi_readable_reg,
>> .volatile_reg = fsl_ssi_volatile_reg,
>> .precious_reg = fsl_ssi_precious_reg,
>
> Is this really necessary? Why do we need separate register configs for one specific SOC?
> There are already too many "if (some_stupid_imx_variant)" blocks in this driver.
This is because (at least according to the datasheet) imx21-class SSI
registers end at CCSR_SSI_SRMSK (no SACC{ST,EN,DIS} regs), so
reading them for cache initialization may not be safe.
Also, a "MXC 91221 only" comment before these regs in FSL tree
(drivers/mxc/ssi/registers.h) seems to confirm that these registers
aren't present at least on some SSI (or SoC) models.
Best regards,
Maciej Szmigiero
next prev parent reply other threads:[~2016-01-17 1:02 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-20 20:33 [PATCH 3/3] ASoC: fsl_ssi: remove register defaults Maciej S. Szmigiero
2015-12-23 13:13 ` Fabio Estevam
2016-01-10 21:36 ` Timur Tabi
2016-01-11 12:04 ` Fabio Estevam
2016-01-11 12:10 ` Fabio Estevam
2016-01-11 13:57 ` Maciej S. Szmigiero
2016-01-11 14:05 ` Fabio Estevam
2016-01-16 23:56 ` Maciej S. Szmigiero
2016-01-17 0:10 ` Timur Tabi
2016-01-17 1:01 ` Maciej S. Szmigiero [this message]
2016-01-17 5:16 ` Timur Tabi
2016-01-17 14:16 ` Maciej S. Szmigiero
2016-01-17 14:39 ` Maciej S. Szmigiero
2016-01-17 18:38 ` Timur Tabi
2016-01-17 22:02 ` Maciej S. Szmigiero
2016-01-18 12:51 ` Fabio Estevam
2016-01-18 19:08 ` Maciej S. Szmigiero
2016-01-11 14:00 ` Mark Brown
2016-01-11 14:10 ` Maciej S. Szmigiero
2016-01-11 14:54 ` Mark Brown
2016-01-11 15:45 ` Timur Tabi
2016-01-11 16:12 ` Mark Brown
2016-01-12 1:23 ` Timur Tabi
2016-01-12 1:34 ` Mark Brown
2016-01-12 1:53 ` Timur Tabi
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