From: Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
To: Michael Ellerman <michael@ellerman.id.au>,
Laurent Dufour <ldufour@linux.vnet.ibm.com>,
Anshuman Khandual <khandual@linux.vnet.ibm.com>,
linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
Michael Ellerman <mpe@ellerman.id.au>
Cc: mikey@neuling.org, james.hogan@imgtec.com, avagin@openvz.org,
Paul.Clothier@imgtec.com, davem@davemloft.net,
peterz@infradead.org, palves@redhat.com, shuahkh@osg.samsung.com,
oleg@redhat.com, dhowells@redhat.com, Ulrich.Weigand@de.ibm.com,
kirjanov@gmail.com, tglx@linutronix.de, davej@redhat.com,
akpm@linux-foundation.org, sukadev@linux.vnet.ibm.com,
sam.bobroff@au1.ibm.com
Subject: Re: [PATCH V10 00/28] Add new powerpc specific ELF core notes
Date: Mon, 11 Apr 2016 03:32:40 -0300 [thread overview]
Message-ID: <570B4508.6060806@linux.vnet.ibm.com> (raw)
In-Reply-To: <5EA48413-85A1-4CB7-8843-CE22B2BB1F08@ellerman.id.au>
On 04/07/2016 06:49 PM, Michael Ellerman wrote:
>
>
> On 7 April 2016 7:23:46 pm AEST, Laurent Dufour <ldufour@linux.vnet.ibm.com> wrote:
>> On 16/02/2016 09:59, Anshuman Khandual wrote:
>>> This patch series adds twelve new ELF core note sections which can
>>> be used with existing ptrace request PTRACE_GETREGSET-SETREGSET for
>> accessing
>>> various transactional memory and other miscellaneous debug register
>> sets on
>>> powerpc platform.
>>
>> Hi Michael,
>>
>> This series is required to handle TM state in CRIU.
>> Is there a chance to get it upstream soon ?
>
> We were waiting on the gdb support to make sure it had some testing. If it's working for CRIU that would be a good data point, have you actually tested it with CRIU?
>
> cheers
>
Hi Michael, Anshuman,
I've managed to implement the GDB support for the new regsets and test
on Power8 (BE and LE). The following is an example of GDB 'info
registers all' partial output showing the new registers when inside a
suspended transaction on Power8 LE using this patchset. Please let me
know if you need any additional information or tests from GDB side.
(gdb) info registers all
...
dscr 0x0 0
ppr 0xc000000000000 3377699720527872
tar 0x0 0
ebbrr <unavailable>
ebbhr <unavailable>
bescr <unavailable>
siar <unavailable>
sdar <unavailable>
sier <unavailable>
mmcr2 <unavailable>
mmcr0 <unavailable>
tfhar 0x10002b30 268446512
texasr 0x110000098000001 76561196215435265
tfiar 0x10002ad9 268446425
cr0 0x10002b2c 268446508
cr1 0x3fffffffeb20 70368744172320
cr2 0x10027f00 268599040
cr3 0x10020278 268567160
cr4 0x1000339c 268448668
cr5 0x42000488 1107297416
cr6 0x4000 16384
cr7 0x3fffb7ea0f28 70367534780200
cr8 0x800000010280f033 9223372041191747635
cr9 0x10020178 268566904
cr10 0x10020278 268567160
cr11 0x0 0
cr12 0x0 0
cr13 0x3fffb7ffc350 70367536202576
cr14 0x0 0
cr15 0x0 0
cr16 0x0 0
cr17 0x0 0
cr18 0x0 0
cr19 0x0 0
cr20 0x0 0
cr21 0x0 0
cr22 0x0 0
cr23 0x0 0
cr24 0x0 0
cr25 0x0 0
cr26 0x0 0
cr27 0x3fffb7fef718 70367536150296
cr28 0x0 0
cr29 0x3fffb7fef720 70367536150304
cr30 0x0 0
cr31 0x3fffffffeb20 70368744172320
cf0 0.30000001192092896 (raw 0x3fd3333340000000)
cf1 0.30000001192092896 (raw 0x3fd3333340000000)
cf2 0.30000001192092896 (raw 0x3fd3333340000000)
cf3 0.30000001192092896 (raw 0x3fd3333340000000)
cf4 0.30000001192092896 (raw 0x3fd3333340000000)
cf5 0.30000001192092896 (raw 0x3fd3333340000000)
cf6 0.30000001192092896 (raw 0x3fd3333340000000)
cf7 0.30000001192092896 (raw 0x3fd3333340000000)
cf8 0.30000001192092896 (raw 0x3fd3333340000000)
cf9 0.30000001192092896 (raw 0x3fd3333340000000)
cf10 0.30000001192092896 (raw 0x3fd3333340000000)
cf11 0.30000001192092896 (raw 0x3fd3333340000000)
cf12 0.30000001192092896 (raw 0x3fd3333340000000)
cf13 0.30000001192092896 (raw 0x3fd3333340000000)
cf14 0.30000001192092896 (raw 0x3fd3333340000000)
cf15 0.30000001192092896 (raw 0x3fd3333340000000)
cf16 0.30000001192092896 (raw 0x3fd3333340000000)
cf17 0.30000001192092896 (raw 0x3fd3333340000000)
cf18 0.30000001192092896 (raw 0x3fd3333340000000)
cf19 0.30000001192092896 (raw 0x3fd3333340000000)
cf20 0.30000001192092896 (raw 0x3fd3333340000000)
cf21 0.30000001192092896 (raw 0x3fd3333340000000)
cf22 0.30000001192092896 (raw 0x3fd3333340000000)
cf23 0.30000001192092896 (raw 0x3fd3333340000000)
cf24 0.30000001192092896 (raw 0x3fd3333340000000)
cf25 0.30000001192092896 (raw 0x3fd3333340000000)
cf26 0.30000001192092896 (raw 0x3fd3333340000000)
cf27 0.30000001192092896 (raw 0x3fd3333340000000)
cf28 0.30000001192092896 (raw 0x3fd3333340000000)
cf29 0.30000001192092896 (raw 0x3fd3333340000000)
cf30 0.30000001192092896 (raw 0x3fd3333340000000)
cf31 0.30000001192092896 (raw 0x3fd3333340000000)
cfpscr 0x0 0
cvr0 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr1 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr2 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr3 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr4 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr5 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr6 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr7 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr8 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr9 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr10 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr11 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr12 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr13 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr14 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr15 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr16 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr17 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr18 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr19 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr20 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr21 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr22 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr23 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr24 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr25 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr26 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr27 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr28 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr29 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr30 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvr31 {uint128 = 0x00000000000000000000000000000000, v4_float =
{0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0, 0x0, 0x0}, v8_int16 = {0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}}
cvscr 0x0 0
cvrsave 0xffffffff -1
cdscr 0x0 0
cppr 0xc000000000000 3377699720527872
ctar 0x0 0
cvs0 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs1 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs2 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs3 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs4 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs5 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs6 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs7 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs8 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs9 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs10 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs11 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs12 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs13 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs14 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs15 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs16 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs17 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs18 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs19 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs20 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs21 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs22 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs23 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs24 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs25 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs26 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs27 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs28 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs29 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs30 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs31 {uint128 = 0x3fd33333400000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x2, 0x1}, v4_int32 = {0x0, 0x0,
0x40000000, 0x3fd33333}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x4000,
0x3333, 0x3fd3}, v16_int8 = {0x0 <repeats 11 times>, 0x40, 0x33, 0x33,
0xd3, 0x3f}}
cvs32 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs33 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs34 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs35 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs36 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs37 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs38 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs39 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs40 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs41 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs42 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs43 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs44 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs45 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs46 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs47 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs48 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs49 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs50 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs51 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs52 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs53 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs54 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs55 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs56 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs57 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs58 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs59 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs60 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs61 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs62 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cvs63 {uint128 = 0x00000000000000000000000000000000, v2_double
= {0x0, 0x0}, v4_float = {0x0, 0x0, 0x0, 0x0}, v4_int32 = {0x0, 0x0,
0x0, 0x0}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, v16_int8
= {0x0 <repeats 16 times>}}
cf32 0 (raw 0x0000000000000000)
cf33 0 (raw 0x0000000000000000)
cf34 0 (raw 0x0000000000000000)
cf35 0 (raw 0x0000000000000000)
cf36 0 (raw 0x0000000000000000)
cf37 0 (raw 0x0000000000000000)
cf38 0 (raw 0x0000000000000000)
cf39 0 (raw 0x0000000000000000)
cf40 0 (raw 0x0000000000000000)
cf41 0 (raw 0x0000000000000000)
cf42 0 (raw 0x0000000000000000)
cf43 0 (raw 0x0000000000000000)
cf44 0 (raw 0x0000000000000000)
cf45 0 (raw 0x0000000000000000)
cf46 0 (raw 0x0000000000000000)
cf47 0 (raw 0x0000000000000000)
cf48 0 (raw 0x0000000000000000)
cf49 0 (raw 0x0000000000000000)
cf50 0 (raw 0x0000000000000000)
cf51 0 (raw 0x0000000000000000)
cf52 0 (raw 0x0000000000000000)
cf53 0 (raw 0x0000000000000000)
cf54 0 (raw 0x0000000000000000)
cf55 0 (raw 0x0000000000000000)
cf56 0 (raw 0x0000000000000000)
cf57 0 (raw 0x0000000000000000)
cf58 0 (raw 0x0000000000000000)
cf59 0 (raw 0x0000000000000000)
cf60 0 (raw 0x0000000000000000)
cf61 0 (raw 0x0000000000000000)
cf62 0 (raw 0x0000000000000000)
cf63 0 (raw 0x0000000000000000)
Thanks and regards,
--
Edjunior Barbosa Machado
next prev parent reply other threads:[~2016-04-11 6:32 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-16 8:59 [PATCH V10 00/28] Add new powerpc specific ELF core notes Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 01/28] elf: Add powerpc specific core note sections Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 02/28] powerpc, process: Add the function flush_tmregs_to_thread Anshuman Khandual
2016-03-02 0:15 ` Cyril Bur
2016-03-02 4:29 ` Anshuman Khandual
2016-03-02 4:56 ` Cyril Bur
2016-02-16 8:59 ` [PATCH V10 03/28] powerpc, ptrace: Enable in transaction NT_PRFPREG ptrace requests Anshuman Khandual
2016-02-16 9:09 ` Denis Kirjanov
2016-02-16 10:16 ` Michael Ellerman
2016-02-16 8:59 ` [PATCH V10 04/28] powerpc, ptrace: Enable in transaction NT_PPC_VMX " Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 05/28] powerpc, ptrace: Enable in transaction NT_PPC_VSX " Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 06/28] powerpc, ptrace: Adapt gpr32_get, gpr32_set functions for transaction Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 07/28] powerpc, ptrace: Enable support for NT_PPC_CGPR Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 08/28] powerpc, ptrace: Enable support for NT_PPC_CFPR Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 09/28] powerpc, ptrace: Enable support for NT_PPC_CVMX Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 10/28] powerpc, ptrace: Enable support for NT_PPC_CVSX Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 11/28] powerpc, ptrace: Enable support for TM SPR state Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 12/28] powerpc, ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 13/28] powerpc, ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 14/28] powerpc, ptrace: Enable support for EBB registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 15/28] selftests, powerpc: Move 'reg.h' file outside of 'ebb' sub directory Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 16/28] selftests, powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h' Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 17/28] selftests, powerpc: Add ptrace tests for EBB Anshuman Khandual
2016-03-02 0:32 ` Cyril Bur
2016-03-02 8:59 ` Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 18/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers Anshuman Khandual
2016-03-02 0:40 ` Cyril Bur
2016-03-02 9:05 ` Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 19/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 20/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in suspended TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 21/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 22/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 23/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 24/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 25/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 26/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in suspended TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 27/28] selftests, powerpc: Add ptrace tests for TM SPR registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 28/28] selftests, powerpc: Add .gitignore file for ptrace executables Anshuman Khandual
2016-04-07 9:23 ` [PATCH V10 00/28] Add new powerpc specific ELF core notes Laurent Dufour
2016-04-07 21:49 ` Michael Ellerman
2016-04-11 6:32 ` Edjunior Barbosa Machado [this message]
2016-04-13 5:36 ` Michael Ellerman
2016-04-26 13:23 ` Edjunior Barbosa Machado
2016-04-11 7:40 ` Laurent Dufour
2016-04-13 5:14 ` Michael Ellerman
2016-04-21 16:00 ` Laurent Dufour
2016-05-27 8:07 ` Laurent Dufour
2016-05-30 23:12 ` Michael Ellerman
2016-06-01 8:26 ` Anshuman Khandual
2016-06-02 22:26 ` Cyril Bur
2016-06-06 8:57 ` Anshuman Khandual
2016-06-08 11:18 ` Michael Ellerman
2016-05-06 11:49 ` Michael Ellerman
2016-05-09 12:54 ` Anshuman Khandual
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