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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 21/45] powerpc/mm: Standardise pte_update() prototype between PPC32 and PPC64
Date: Mon, 11 May 2020 11:25:47 +0000 (UTC)	[thread overview]
Message-ID: <676a4cba131251df9001e965642ee2668131282b.1589196133.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1589196133.git.christophe.leroy@csgroup.eu>

PPC64 takes 3 additional parameters compared to PPC32:
- mm
- address
- huge

These 3 parameters will be needed in order to perform different
action depending on the page size on the 8xx.

Make pte_update() prototype identical for PPC32 and PPC64.

This allows dropping an #ifdef in huge_ptep_get_and_clear().

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/include/asm/book3s/32/pgtable.h | 15 ++++++++-------
 arch/powerpc/include/asm/hugetlb.h           |  4 ----
 arch/powerpc/include/asm/nohash/32/pgtable.h | 13 +++++++------
 3 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index 8122f0b55d21..f5eab98c4e41 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -218,7 +218,7 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
  */
 
 #define pte_clear(mm, addr, ptep) \
-	do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
+	do { pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, 0, 0); } while (0)
 
 #define pmd_none(pmd)		(!pmd_val(pmd))
 #define	pmd_bad(pmd)		(pmd_val(pmd) & _PMD_BAD)
@@ -254,7 +254,8 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
  * when using atomic updates, only the low part of the PTE is
  * accessed atomically.
  */
-static inline pte_basic_t pte_update(pte_t *p, unsigned long clr, unsigned long set)
+static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, pte_t *p,
+				     unsigned long clr, unsigned long set, int huge)
 {
 	pte_basic_t old;
 	unsigned long tmp;
@@ -292,7 +293,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 					      unsigned long addr, pte_t *ptep)
 {
 	unsigned long old;
-	old = pte_update(ptep, _PAGE_ACCESSED, 0);
+	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
 	if (old & _PAGE_HASHPTE) {
 		unsigned long ptephys = __pa(ptep) & PAGE_MASK;
 		flush_hash_pages(mm->context.id, addr, ptephys, 1);
@@ -306,14 +307,14 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
 				       pte_t *ptep)
 {
-	return __pte(pte_update(ptep, ~_PAGE_HASHPTE, 0));
+	return __pte(pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, 0, 0));
 }
 
 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
 				      pte_t *ptep)
 {
-	pte_update(ptep, _PAGE_RW, 0);
+	pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
 }
 
 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
@@ -324,7 +325,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
 	unsigned long set = pte_val(entry) &
 		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
 
-	pte_update(ptep, 0, set);
+	pte_update(vma->vm_mm, address, ptep, 0, set, 0);
 
 	flush_tlb_page(vma, address);
 }
@@ -522,7 +523,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
 		*ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
 			      | (pte_val(pte) & ~_PAGE_HASHPTE));
 	else
-		pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte));
+		pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, pte_val(pte), 0);
 
 #elif defined(CONFIG_PTE_64BIT)
 	/* Second case is 32-bit with 64-bit PTE.  In this case, we
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index bd6504c28c2f..e4276af034e9 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -40,11 +40,7 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
 static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 					    unsigned long addr, pte_t *ptep)
 {
-#ifdef CONFIG_PPC64
 	return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));
-#else
-	return __pte(pte_update(ptep, ~0UL, 0));
-#endif
 }
 
 #define __HAVE_ARCH_HUGE_PTEP_CLEAR_FLUSH
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index ddf681ceb860..75880eb1cb91 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -166,7 +166,7 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
 #ifndef __ASSEMBLY__
 
 #define pte_clear(mm, addr, ptep) \
-	do { pte_update(ptep, ~0, 0); } while (0)
+	do { pte_update(mm, addr, ptep, ~0, 0, 0); } while (0)
 
 #ifndef pte_mkwrite
 static inline pte_t pte_mkwrite(pte_t pte)
@@ -222,7 +222,8 @@ static inline void pmd_clear(pmd_t *pmdp)
  * to properly flush the virtually tagged instruction cache of
  * those implementations.
  */
-static inline pte_basic_t pte_update(pte_t *p, unsigned long clr, unsigned long set)
+static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, pte_t *p,
+				     unsigned long clr, unsigned long set, int huge)
 {
 #if defined(PTE_ATOMIC_UPDATES) && !defined(CONFIG_PTE_64BIT)
 	unsigned long old, tmp;
@@ -260,7 +261,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 					      unsigned long addr, pte_t *ptep)
 {
 	unsigned long old;
-	old = pte_update(ptep, _PAGE_ACCESSED, 0);
+	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
 	return (old & _PAGE_ACCESSED) != 0;
 }
 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
@@ -270,7 +271,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
 				       pte_t *ptep)
 {
-	return __pte(pte_update(ptep, ~0, 0));
+	return __pte(pte_update(mm, addr, ptep, ~0, 0, 0));
 }
 
 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
@@ -280,7 +281,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
 	unsigned long clr = ~pte_val(pte_wrprotect(__pte(~0)));
 	unsigned long set = pte_val(pte_wrprotect(__pte(0)));
 
-	pte_update(ptep, clr, set);
+	pte_update(mm, addr, ptep, clr, set, 0);
 }
 
 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
@@ -293,7 +294,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
 	unsigned long set = pte_val(entry) & pte_val(pte_set);
 	unsigned long clr = ~pte_val(entry) & ~pte_val(pte_clr);
 
-	pte_update(ptep, clr, set);
+	pte_update(vma->vm_mm, address, ptep, clr, set, 0);
 
 	flush_tlb_page(vma, address);
 }
-- 
2.25.0


  parent reply	other threads:[~2020-05-11 12:34 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-11 11:25 [PATCH v3 00/45] Use hugepages to map kernel mem on 8xx Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 01/45] powerpc/kasan: Fix error detection on memory allocation Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 02/45] powerpc/kasan: Fix issues by lowering KASAN_SHADOW_END Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 03/45] powerpc/kasan: Fix shadow pages allocation failure Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 04/45] powerpc/kasan: Remove unnecessary page table locking Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 05/45] powerpc/kasan: Refactor update of early shadow mappings Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 06/45] powerpc/kasan: Declare kasan_init_region() weak Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 07/45] powerpc/ptdump: Limit size of flags text to 1/2 chars on PPC32 Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 08/45] powerpc/ptdump: Reorder flags Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 09/45] powerpc/ptdump: Add _PAGE_COHERENT flag Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 10/45] powerpc/ptdump: Display size of BATs Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 11/45] powerpc/ptdump: Standardise display of BAT flags Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 12/45] powerpc/ptdump: Properly handle non standard page size Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 13/45] powerpc/ptdump: Handle hugepd at PGD level Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 14/45] powerpc/32s: Don't warn when mapping RO data ROX Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 15/45] powerpc/mm: Allocate static page tables for fixmap Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 16/45] powerpc/mm: Fix conditions to perform MMU specific management by blocks on PPC32 Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 17/45] powerpc/mm: PTE_ATOMIC_UPDATES is only for 40x Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 18/45] powerpc/mm: Refactor pte_update() on nohash/32 Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 19/45] powerpc/mm: Refactor pte_update() on book3s/32 Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 20/45] powerpc/mm: Standardise __ptep_test_and_clear_young() params between PPC32 and PPC64 Christophe Leroy
2020-05-11 11:25 ` Christophe Leroy [this message]
2020-05-11 11:25 ` [PATCH v3 22/45] powerpc/mm: Create a dedicated pte_update() for 8xx Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 23/45] powerpc/mm: Reduce hugepd size for 8M hugepages on 8xx Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 24/45] powerpc/8xx: Drop CONFIG_8xx_COPYBACK option Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 25/45] powerpc/8xx: Prepare handlers for _PAGE_HUGE for 512k pages Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 26/45] powerpc/8xx: Manage 512k huge pages as standard pages Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 27/45] powerpc/8xx: Only 8M pages are hugepte pages now Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 28/45] powerpc/8xx: MM_SLICE is not needed anymore Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 29/45] powerpc/8xx: Move PPC_PIN_TLB options into 8xx Kconfig Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 30/45] powerpc/8xx: Add function to set pinned TLBs Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 31/45] powerpc/8xx: Don't set IMMR map anymore at boot Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 32/45] powerpc/8xx: Always pin TLBs at startup Christophe Leroy
2020-05-11 11:25 ` [PATCH v3 33/45] powerpc/8xx: Drop special handling of Linear and IMMR mappings in I/D TLB handlers Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 34/45] powerpc/8xx: Remove now unused TLB miss functions Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 35/45] powerpc/8xx: Move DTLB perf handling closer Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 36/45] powerpc/mm: Don't be too strict with _etext alignment on PPC32 Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 37/45] powerpc/8xx: Refactor kernel address boundary comparison Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 38/45] powerpc/8xx: Add a function to early map kernel via huge pages Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 39/45] powerpc/8xx: Map IMMR with a huge page Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 40/45] powerpc/8xx: Map linear memory with huge pages Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 41/45] powerpc/8xx: Allow STRICT_KERNEL_RwX with pinned TLB Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 42/45] powerpc/8xx: Allow large TLBs with DEBUG_PAGEALLOC Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 43/45] powerpc/8xx: Implement dedicated kasan_init_region() Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 44/45] powerpc/32s: Allow mapping with BATs with DEBUG_PAGEALLOC Christophe Leroy
2020-05-11 11:26 ` [PATCH v3 45/45] powerpc/32s: Implement dedicated kasan_init_region() Christophe Leroy

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