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Mon, 13 Jun 2022 19:00:46 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0AF8142042; Mon, 13 Jun 2022 19:00:46 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5DEF94203F; Mon, 13 Jun 2022 19:00:39 +0000 (GMT) Received: from [9.211.149.2] (unknown [9.211.149.2]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 13 Jun 2022 19:00:38 +0000 (GMT) Message-ID: <6a991140-f0f8-dbfc-d596-ce1473251034@linux.ibm.com> Date: Tue, 14 Jun 2022 00:30:36 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v2 4/5] bpf ppc32: add support for BPF_ATOMIC bitwise operations Content-Language: en-US To: Christophe Leroy , "bpf@vger.kernel.org" , linuxppc-dev References: <20220610155552.25892-1-hbathini@linux.ibm.com> <20220610155552.25892-5-hbathini@linux.ibm.com> <0f41cc76-a214-03c5-8764-808e5001b906@csgroup.eu> From: Hari Bathini In-Reply-To: <0f41cc76-a214-03c5-8764-808e5001b906@csgroup.eu> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: EvrEYdyXObGWiaTpsAFZ-BVqtCq5SoR7 X-Proofpoint-ORIG-GUID: UDiTIEQnAuvdu_9pwmNEw6lQWXqXwFpr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-13_08,2022-06-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 clxscore=1015 mlxlogscore=862 phishscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206130078 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Song Liu , Daniel Borkmann , "netdev@vger.kernel.org" , John Fastabend , Alexei Starovoitov , Andrii Nakryiko , Paul Mackerras , Jordan Niethe , "Naveen N. Rao" , Yonghong Song , KP Singh , Martin KaFai Lau Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 11/06/22 10:44 pm, Christophe Leroy wrote: > > > Le 10/06/2022 à 17:55, Hari Bathini a écrit : >> Adding instructions for ppc32 for >> >> atomic_and >> atomic_or >> atomic_xor >> atomic_fetch_add >> atomic_fetch_and >> atomic_fetch_or >> atomic_fetch_xor >> >> Signed-off-by: Hari Bathini >> --- >> >> Changes in v2: >> * Used an additional register (BPF_REG_AX) >> - to avoid clobbering src_reg. >> - to keep the lwarx reservation as intended. >> - to avoid the odd switch/goto construct. > > Might be a stupid question as I don't know the internals of BPF: Are we > sure BPF_REG_AX cannot be the src reg or the dst reg ? > AFAICS, BPF_REG_AX wouldn't be used as src_reg or dst_reg unless this code is reused internally, by arch-specific code, for JIT'ing some other instruction(s) using BPF_REG_AX as either src or dst reg.. Thanks Hari