From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51978C433E2 for ; Fri, 4 Sep 2020 04:06:25 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F11E4206CA for ; Fri, 4 Sep 2020 04:06:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F11E4206CA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4BjPHf3yYmzDrHd for ; Fri, 4 Sep 2020 14:06:22 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=arm.com (client-ip=217.140.110.172; helo=foss.arm.com; envelope-from=anshuman.khandual@arm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lists.ozlabs.org (Postfix) with ESMTP id 4BjPFN2BR6zDr24 for ; Fri, 4 Sep 2020 14:04:22 +1000 (AEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 12BC6101E; Thu, 3 Sep 2020 21:04:21 -0700 (PDT) Received: from [10.163.70.23] (unknown [10.163.70.23]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3B9653F71F; Thu, 3 Sep 2020 21:04:18 -0700 (PDT) Subject: Re: [PATCH v4 03/13] mm/debug_vm_pgtable/ppc64: Avoid setting top bits in radom value To: "Aneesh Kumar K.V" , linux-mm@kvack.org, akpm@linux-foundation.org References: <20200902114222.181353-1-aneesh.kumar@linux.ibm.com> <20200902114222.181353-4-aneesh.kumar@linux.ibm.com> From: Anshuman Khandual Message-ID: <74b87dca-1c8d-6458-8af6-392b87c0bfc6@arm.com> Date: Fri, 4 Sep 2020 09:33:47 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20200902114222.181353-4-aneesh.kumar@linux.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 09/02/2020 05:12 PM, Aneesh Kumar K.V wrote: > ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid setting > that bit in random value. > > Signed-off-by: Aneesh Kumar K.V > --- > mm/debug_vm_pgtable.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c > index 086309fb9b6f..00649b47f6e0 100644 > --- a/mm/debug_vm_pgtable.c > +++ b/mm/debug_vm_pgtable.c > @@ -44,10 +44,17 @@ > * entry type. But these bits might affect the ability to clear entries with > * pxx_clear() because of how dynamic page table folding works on s390. So > * while loading up the entries do not change the lower 4 bits. It does not > - * have affect any other platform. > + * have affect any other platform. Also avoid the 62nd bit on ppc64 that is > + * used to mark a pte entry. > */ > -#define S390_MASK_BITS 4 > -#define RANDOM_ORVALUE GENMASK(BITS_PER_LONG - 1, S390_MASK_BITS) > +#define S390_SKIP_MASK GENMASK(3, 0) > +#if __BITS_PER_LONG == 64 > +#define PPC64_SKIP_MASK GENMASK(62, 62) > +#else > +#define PPC64_SKIP_MASK 0x0 > +#endif > +#define ARCH_SKIP_MASK (S390_SKIP_MASK | PPC64_SKIP_MASK) > +#define RANDOM_ORVALUE (GENMASK(BITS_PER_LONG - 1, 0) & ~ARCH_SKIP_MASK) > #define RANDOM_NZVALUE GENMASK(7, 0) > > static void __init pte_basic_tests(unsigned long pfn, pgprot_t prot) > Reviewed-by: Anshuman Khandual