From: "Aggrwal Poonam-B10812" <B10812@freescale.com>
To: "Micha Nelissen" <micha@neli.hopto.org>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: RE: [PATCH] e500v2 36 bit large physical HID0[EN_MAS7_UPDATE]
Date: Wed, 16 Jun 2010 17:08:36 +0530 [thread overview]
Message-ID: <8660DA277DC57B4BAAC78225F03146B6AB1BD3@zin33exm24.fsl.freescale.net> (raw)
In-Reply-To: <4C18B6AD.3030200@neli.hopto.org>
> -----Original Message-----
> From: Micha Nelissen [mailto:micha@neli.hopto.org]
> Sent: Wednesday, June 16, 2010 5:04 PM
> To: Aggrwal Poonam-B10812
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] e500v2 36 bit large physical HID0[EN_MAS7_UPDATE]
>=20
> Aggrwal Poonam-B10812 wrote:
> > Not sure of other platforms but on 85xx platforms on which I am
> > currently working u-boot does LAW and eLBC programming for 36bit
> > physical address. Hence possibly u-boot has to made aware of large
> > physical address space.
> > Please correct me if I am wrong.
>=20
> Yes, I can understand this for SDRAM and local flash interface. For
> RapidIO we have (local) patches to pass the law address range in the
dtb.
> Perhaps also for PCI-express this might be done; U-boot has nothing to
> with these high speed interfaces (in our case at least).
You are correct , for PCIe and SRIO kinds of interfaces Linux reprograms
the address windows.
Thanks
Poonam
>=20
> Micha
next prev parent reply other threads:[~2010-06-16 11:38 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-16 6:58 [PATCH] e500v2 36 bit large physical HID0[EN_MAS7_UPDATE] Micha Nelissen
2010-06-16 7:29 ` Aggrwal Poonam-B10812
2010-06-16 9:24 ` Micha Nelissen
2010-06-16 10:49 ` Aggrwal Poonam-B10812
2010-06-16 11:34 ` Micha Nelissen
2010-06-16 11:38 ` Aggrwal Poonam-B10812 [this message]
2010-06-16 14:23 ` Timur Tabi
2010-06-16 14:52 ` Micha Nelissen
2010-06-22 22:39 ` Scott Wood
2010-06-16 15:01 ` Kumar Gala
2010-06-16 15:12 ` Micha Nelissen
2010-06-16 15:18 ` Micha Nelissen
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