From: Michael Ellerman <mpe@ellerman.id.au>
To: Christophe Leroy <christophe.leroy@c-s.fr>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>, Scott Wood <oss@buserror.net>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc: ipic - fix status get and status clear
Date: Thu, 19 Oct 2017 16:06:01 +1100 [thread overview]
Message-ID: <8760bbn2va.fsf@concordia.ellerman.id.au> (raw)
In-Reply-To: <20171018091647.B9E9F6872C@po15668-vm-win7.idsi0.si.c-s.fr>
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> IPIC Status is provided by register IPIC_SERSR and not by IPIC_SERMR
> which is the mask register.
This seems like it would be a bad bug. But I guess it hasn't mattered
for some reason?
cheers
> diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
> index 16f1edd78c40..535cf1f6941c 100644
> --- a/arch/powerpc/sysdev/ipic.c
> +++ b/arch/powerpc/sysdev/ipic.c
> @@ -846,12 +846,12 @@ void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq)
>
> u32 ipic_get_mcp_status(void)
> {
> - return ipic_read(primary_ipic->regs, IPIC_SERMR);
> + return ipic_read(primary_ipic->regs, IPIC_SERSR);
> }
>
> void ipic_clear_mcp_status(u32 mask)
> {
> - ipic_write(primary_ipic->regs, IPIC_SERMR, mask);
> + ipic_write(primary_ipic->regs, IPIC_SERSR, mask);
> }
>
> /* Return an interrupt vector or 0 if no interrupt is pending. */
> --
> 2.13.3
next prev parent reply other threads:[~2017-10-19 5:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-18 9:16 [PATCH] powerpc: ipic - fix status get and status clear Christophe Leroy
2017-10-19 5:06 ` Michael Ellerman [this message]
2017-10-19 5:51 ` Christophe LEROY
2017-11-07 23:30 ` Michael Ellerman
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