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Fri, 16 Apr 2021 18:34:52 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A5127AE05F; Fri, 16 Apr 2021 18:34:51 +0000 (GMT) Received: from localhost (unknown [9.211.116.137]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTPS; Fri, 16 Apr 2021 18:34:51 +0000 (GMT) From: Fabiano Rosas To: Nicholas Piggin , kvm-ppc@vger.kernel.org Subject: Re: [PATCH v1 12/12] KVM: PPC: Book3S HV: Ensure MSR[HV] is always clear in guest MSR In-Reply-To: <20210412014845.1517916-13-npiggin@gmail.com> References: <20210412014845.1517916-1-npiggin@gmail.com> <20210412014845.1517916-13-npiggin@gmail.com> Date: Fri, 16 Apr 2021 15:34:49 -0300 Message-ID: <877dl2m62e.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 4gUmXwsEd9XeAssgMTC25zdhociVGTeu X-Proofpoint-ORIG-GUID: iJgKTH7kbaCCQPrhQsgo3Lbxyo9lzLqW X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-16_09:2021-04-16, 2021-04-16 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 suspectscore=0 phishscore=0 malwarescore=0 mlxscore=0 adultscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104160131 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Nicholas Piggin writes: > Rather than clear the HV bit from the MSR at guest entry, make it clear > that the hypervisor does not allow the guest to set the bit. > > The HV clear is kept in guest entry for now, but a future patch will > warn if it is set. > > Acked-by: Paul Mackerras > Signed-off-by: Nicholas Piggin Reviewed-by: Fabiano Rosas > --- > arch/powerpc/kvm/book3s_hv_builtin.c | 4 ++-- > arch/powerpc/kvm/book3s_hv_nested.c | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c > index 41cb03d0bde4..7a0e33a9c980 100644 > --- a/arch/powerpc/kvm/book3s_hv_builtin.c > +++ b/arch/powerpc/kvm/book3s_hv_builtin.c > @@ -662,8 +662,8 @@ static void kvmppc_end_cede(struct kvm_vcpu *vcpu) > > void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) > { > - /* Guest must always run with ME enabled. */ > - msr = msr | MSR_ME; > + /* Guest must always run with ME enabled, HV disabled. */ > + msr = (msr | MSR_ME) & ~MSR_HV; > > /* > * Check for illegal transactional state bit combination > diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c > index fb03085c902b..60724f674421 100644 > --- a/arch/powerpc/kvm/book3s_hv_nested.c > +++ b/arch/powerpc/kvm/book3s_hv_nested.c > @@ -344,8 +344,8 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu) > vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token; > vcpu->arch.regs = l2_regs; > > - /* Guest must always run with ME enabled. */ > - vcpu->arch.shregs.msr = vcpu->arch.regs.msr | MSR_ME; > + /* Guest must always run with ME enabled, HV disabled. */ > + vcpu->arch.shregs.msr = (vcpu->arch.regs.msr | MSR_ME) & ~MSR_HV; > > sanitise_hv_regs(vcpu, &l2_hv); > restore_hv_regs(vcpu, &l2_hv);