* [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor
@ 2019-08-08 4:05 Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 1/7] Documentation/powerpc: Ultravisor API Claudio Carvalho
` (6 more replies)
0 siblings, 7 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
Protected Execution Facility (PEF) is an architectural change for POWER 9
that enables Secure Virtual Machines (SVMs). When enabled, PEF adds a new
higher privileged mode, called Ultravisor mode, to POWER architecture.
Along with the new mode there is new firmware called the Protected
Execution Ultravisor (or Ultravisor for short). Ultravisor mode is the
highest privileged mode in POWER architecture.
The Ultravisor calls allow the SVMs and Hypervisor to request services from
the Ultravisor such as accessing a register or memory region that can only
be accessed when running in Ultravisor-privileged mode.
This patch set adds support for Ultravisor calls and do some preparation
for running secure guests.
---
Changelog:
---
v4->v5:
- New patch "Documentation/powerpc: Ultravisor API"
- Patch "v4: KVM: PPC: Ultravisor: Add generic ultravisor call handler":
- Made global the ucall_norets symbol without adding it to the TOC.
- Implemented ucall_norets() rather than ucall().
- Defined the ucall_norets in "asm/asm-prototypes.h" for symbol
versioning.
- Renamed to "powerpc/kernel: Add ucall_norets() ultravisor call
handler".
- Updated the commit message.
- Patch "v4: powerpc: Introduce FW_FEATURE_ULTRAVISOR":
- Changed to scan for a node that is compatible with "ibm,ultravisor"
- Renamed to "powerpc/powernv: Introduce FW_FEATURE_ULTRAVISOR".
- Updated the commit message.
- Patch "v4: KVM: PPC: Ultravisor: Restrict flush of the partition tlb
cache":
- Merged into "v4: ... Use UV_WRITE_PATE ucall to register a PATE".
- Patch "v4: KVM: PPC: Ultravisor: Use UV_WRITE_PATE ucall to register a
PATE":
- Added back the missing "ptesync" instruction in flush_partition().
- Updated source code comments for the partition table creation.
- Factored out "powerpc/mm: Write to PTCR only if ultravisor disabled".
- Cleaned up the code a bit.
- Renamed to "powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE".
- Updated the commit message.
- Patch "v4: KVM: PPC: Ultravisor: Restrict LDBAR access":
- Dropped the change that skips loading the IMC driver if ultravisor
enabled because skiboot will remove the IMC devtree nodes if
ultravisor enabled.
- Dropped the BEGIN_{END_}FW_FTR_SECTION_NESTED in power8 code.
- Renamed to "powerpc/powernv: Access LDBAR only if ultravisor
disabled".
- Updated the commit message.
- Patch "v4: KVM: PPC: Ultravisor: Enter a secure guest":
- Openned "LOAD_REG_IMMEDIATE(r3, UV_RETURN)" to save instructions
- Used R2, rather than R11, to pass synthesized interrupts in
UV_RETURN ucall.
- Dropped the change that preserves the MSR[S] bit in
"kvmppc_msr_interrupt" because that is done by the ultravisor.
- Hoisted up the load of R6 and R7 to before "bne ret_to_ultra".
- Cleaned up the code a bit.
- Renamed to "powerpc/kvm: Use UV_RETURN ucall to return to ultravisor".
- Updated the commit message.
- Patch "v4: KVM: PPC: Ultravisor: Check for MSR_S during hv_reset_msr":
- Dropped from the patch set because "kvm_arch->secure_guest" rather
than MSR[S] is used to determine if we need to return to the
ultravisor.
- Patch "v4: KVM: PPC: Ultravisor: Introduce the MSR_S bit":
- Moved to the patch set "Secure Virtual Machine Enablement" posted by
Thiago Bauermann. MSR[S] is no longer needed in this patch set.
- Rebased to powerpc/next
v3->v4:
- Patch "KVM: PPC: Ultravisor: Add PPC_UV config option":
- Moved to the patchset "kvmppc: HMM driver to manage pages of secure
guest" v5 that will be posted by Bharata Rao.
- Patch "powerpc: Introduce FW_FEATURE_ULTRAVISOR":
- Changed to depend only on CONFIG_PPC_POWERNV.
- Patch "KVM: PPC: Ultravisor: Add generic ultravisor call handler":
- Fixed whitespaces in ucall.S and in ultravisor-api.h.
- Changed to depend only on CONFIG_PPC_POWERNV.
- Changed the ucall wrapper to pass the ucall number in R3.
- Patch "KVM: PPC: Ultravisor: Use UV_WRITE_PATE ucall to register a
PATE:
- Changed to depend only on CONFIG_PPC_POWERNV.
- Patch "KVM: PPC: Ultravisor: Restrict LDBAR access":
- Fixed comment in opal-imc.c to be "Disable IMC devices, when
Ultravisor is enabled.
- Fixed signed-off-by.
- Patch "KVM: PPC: Ultravisor: Enter a secure guest":
- Changed the UV_RETURN assembly call to save the actual R3 in
R0 for the ultravisor and pass the UV_RETURN call number in R3.
- Patch "KVM: PPC: Ultravisor: Check for MSR_S during hv_reset_msr":
- Fixed commit message.
- Rebased to powerpc/next.
v2->v3:
- Squashed patches:
- "KVM: PPC: Ultravisor: Return to UV for hcalls from SVM"
- "KVM: PPC: Book3S HV: Fixed for running secure guests"
- Renamed patch from/to:
- "KVM: PPC: Ultravisor: Return to UV for hcalls from SVM"
- "KVM: PPC: Ultravisor: Enter a secure guest
- Rebased
- Addressed comments from Paul Mackerras
- Dropped ultravisor checks made in power8 code
- Updated the commit message for:
"KVM: PPC: Ultravisor: Enter a secure guest"
- Addressed comments from Maddy
- Dropped imc-pmu.c changes
- Changed opal-imc.c to fail the probe when the ultravisor is enabled
- Fixed "ucall defined but not used" issue when CONFIG_PPC_UV not set
Claudio Carvalho (4):
powerpc/kernel: Add ucall_norets() ultravisor call handler
powerpc/powernv: Introduce FW_FEATURE_ULTRAVISOR
powerpc/mm: Write to PTCR only if ultravisor disabled
powerpc/powernv: Access LDBAR only if ultravisor disabled
Michael Anderson (1):
powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE
Sukadev Bhattiprolu (2):
Documentation/powerpc: Ultravisor API
powerpc/kvm: Use UV_RETURN ucall to return to ultravisor
Documentation/powerpc/ultravisor.rst | 1055 +++++++++++++++++++
arch/powerpc/include/asm/asm-prototypes.h | 11 +
arch/powerpc/include/asm/firmware.h | 5 +-
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/include/asm/reg.h | 13 +
arch/powerpc/include/asm/ultravisor-api.h | 29 +
arch/powerpc/include/asm/ultravisor.h | 22 +
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kernel/prom.c | 4 +
arch/powerpc/kernel/ucall.S | 20 +
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 39 +-
arch/powerpc/mm/book3s64/hash_utils.c | 4 +-
arch/powerpc/mm/book3s64/pgtable.c | 62 +-
arch/powerpc/mm/book3s64/radix_pgtable.c | 6 +-
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/idle.c | 6 +-
arch/powerpc/platforms/powernv/ultravisor.c | 24 +
18 files changed, 1271 insertions(+), 33 deletions(-)
create mode 100644 Documentation/powerpc/ultravisor.rst
create mode 100644 arch/powerpc/include/asm/ultravisor-api.h
create mode 100644 arch/powerpc/include/asm/ultravisor.h
create mode 100644 arch/powerpc/kernel/ucall.S
create mode 100644 arch/powerpc/platforms/powernv/ultravisor.c
--
2.20.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v5 1/7] Documentation/powerpc: Ultravisor API
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
2019-08-09 12:45 ` Michael Ellerman
2019-08-12 15:58 ` Fabiano Rosas
2019-08-08 4:05 ` [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler Claudio Carvalho
` (5 subsequent siblings)
6 siblings, 2 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Ram Pai, Sukadev Bhattiprolu,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
From: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
POWER9 processor includes support for Protected Execution Facility (PEF).
Attached documentation provides an overview of PEF and defines the API
for various interfaces that must be implemented in the Ultravisor
firmware as well as in the KVM Hypervisor.
Based on input from Mike Anderson, Thiago Bauermann, Claudio Carvalho,
Ben Herrenschmidt, Guerney Hunt, Paul Mackerras.
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
Signed-off-by: Ram Pai <linuxram@linux.ibm.com>
Signed-off-by: Guerney Hunt <gdhh@linux.ibm.com>
Reviewed-by: Claudio Carvalho <cclaudio@linux.ibm.com>
Reviewed-by: Michael Anderson <andmike@linux.ibm.com>
Reviewed-by: Thiago Bauermann <bauerman@linux.ibm.com>
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
---
Documentation/powerpc/ultravisor.rst | 1055 ++++++++++++++++++++++++++
1 file changed, 1055 insertions(+)
create mode 100644 Documentation/powerpc/ultravisor.rst
diff --git a/Documentation/powerpc/ultravisor.rst b/Documentation/powerpc/ultravisor.rst
new file mode 100644
index 000000000000..8d5246585b66
--- /dev/null
+++ b/Documentation/powerpc/ultravisor.rst
@@ -0,0 +1,1055 @@
+.. SPDX-License-Identifier: GPL-2.0
+.. _ultravisor:
+
+============================
+Protected Execution Facility
+============================
+
+.. contents::
+ :depth: 3
+
+.. sectnum::
+ :depth: 3
+
+Protected Execution Facility
+############################
+
+ Protected Execution Facility (PEF) is an architectural change for
+ POWER 9 that enables Secure Virtual Machines (SVMs). When enabled,
+ PEF adds a new higher privileged mode, called Ultravisor mode, to
+ POWER architecture. Along with the new mode there is new firmware
+ called the Protected Execution Ultravisor (or Ultravisor for short).
+ Ultravisor mode is the highest privileged mode in POWER architecture.
+
+ +------------------+
+ | Privilege States |
+ +==================+
+ | Problem |
+ +------------------+
+ | Supervisor |
+ +------------------+
+ | Hypervisor |
+ +------------------+
+ | Ultravisor |
+ +------------------+
+
+ PEF protects SVMs from the hypervisor, privileged users, and other
+ VMs in the system. SVMs are protected while at rest and can only be
+ executed by an authorized machine. All virtual machines utilize
+ hypervisor services. The Ultravisor filters calls between the SVMs
+ and the hypervisor to assure that information does not accidentally
+ leak. All hypercalls except H_RANDOM are reflected to the hypervisor.
+ H_RANDOM is not reflected to prevent the hypervisor from influencing
+ random values in the SVM.
+
+ To support this there is a refactoring of the ownership of resources
+ in the CPU. Some of the resources which were previously hypervisor
+ privileged are now ultravisor privileged.
+
+Hardware
+========
+
+ The hardware changes include the following:
+
+ * There is a new bit in the MSR that determines whether the current
+ process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process
+ is in secure mode, MSR(s)=0 process is in normal mode.
+
+ * The MSR(S) bit can only be set by the Ultravisor.
+
+ * HRFID cannot be used to set the MSR(S) bit. If the hypervisor needs
+ to return to a SVM it must use an ultracall. It can determine if
+ the VM it is returning to is secure.
+
+ * There is a new Ultravisor privileged register, SMFCTRL, which has an
+ enable/disable bit SMFCTRL(E).
+
+ * The privilege of a process is now determined by three MSR bits,
+ MSR(S, HV, PR). In each of the tables below the modes are listed
+ from least privilege to highest privilege. The higher privilege
+ modes can access all the resources of the lower privilege modes.
+
+ **Secure Mode MSR Settings**
+
+ +---+---+---+---------------+
+ | S | HV| PR|Privilege |
+ +===+===+===+===============+
+ | 1 | 0 | 1 | Problem |
+ +---+---+---+---------------+
+ | 1 | 0 | 0 | Privileged(OS)|
+ +---+---+---+---------------+
+ | 1 | 1 | 0 | Ultravisor |
+ +---+---+---+---------------+
+ | 1 | 1 | 1 | Reserved |
+ +---+---+---+---------------+
+
+ **Normal Mode MSR Settings**
+
+ +---+---+---+---------------+
+ | S | HV| PR|Privilege |
+ +===+===+===+===============+
+ | 0 | 0 | 1 | Problem |
+ +---+---+---+---------------+
+ | 0 | 0 | 0 | Privileged(OS)|
+ +---+---+---+---------------+
+ | 0 | 1 | 0 | Hypervisor |
+ +---+---+---+---------------+
+ | 0 | 1 | 1 | Problem (HV) |
+ +---+---+---+---------------+
+
+ * Memory is partitioned into secure and normal memory. Only processes
+ that are running in secure mode can access secure memory.
+
+ * The hardware does not allow anything that is not running secure to
+ access secure memory. This means that the Hypervisor cannot access
+ the memory of the SVM without using an ultracall (asking the
+ Ultravisor). The Ultravisor will only allow the hypervisor to see
+ the SVM memory encrypted.
+
+ * I/O systems are not allowed to directly address secure memory. This
+ limits the SVMs to virtual I/O only.
+
+ * The architecture allows the SVM to share pages of memory with the
+ hypervisor that are not protected with encryption. However, this
+ sharing must be initiated by the SVM.
+
+ * When a process is running in secure mode all hypercalls
+ (syscall lev=1) are reflected to the Ultravisor.
+
+ * When a process is in secure mode all interrupts go to the
+ Ultravisor.
+
+ * The following resources have become Ultravisor privileged and
+ require an Ultravisor interface to manipulate:
+
+ * Processor configurations registers (SCOMs).
+
+ * Stop state information.
+
+ * The debug registers CIABR, DAWR, and DAWRX become Ultravisor
+ resources when SMFCTRL(D) is set. If SMFCTRL(D) is not set they do
+ not work in secure mode. When set, reading and writing requires
+ an Ultravisor call, otherwise that will cause a Hypervisor Emulation
+ Assistance interrupt.
+
+ * PTCR and partition table entries (partition table is in secure
+ memory). An attempt to write to PTCR will cause a Hypervisor
+ Emulation Assitance interrupt.
+
+ * LDBAR (LD Base Address Register) and IMC (In-Memory Collection)
+ non-architected registers. An attempt to write to them will cause a
+ Hypervisor Emulation Assistance interrupt.
+
+ * Paging for an SVM, sharing of memory with Hypervisor for an SVM.
+ (Including Virtual Processor Area (VPA) and virtual I/O).
+
+
+Software/Microcode
+==================
+
+ The software changes include:
+
+ * SVMs are created from normal VM using (open source) tooling supplied
+ by IBM.
+
+ * All SVMs start as normal VMs and utilize an ultracall, UV_ESM
+ (Enter Secure Mode), to make the transition.
+
+ * When the UV_ESM ultracall is made the Ultravisor copies the VM into
+ secure memory, decrypts the verification information, and checks the
+ integrity of the SVM. If the integrity check passes the Ultravisor
+ passes control in secure mode.
+
+ * For external interrupts the Ultravisor saves the state of the SVM,
+ and reflects the interrupt to the hypervisor for processing.
+ For hypercalls, the Ultravisor inserts neutral state into all
+ registers not needed for the hypercall then reflects the call to
+ the hypervisor for processing. The H_RANDOM hypercall is performed
+ by the Ultravisor and not reflected.
+
+ * The verification information includes the pass phrase for the
+ encrypted disk associated with the SVM. This pass phrase is given
+ to the SVM when requested.
+
+ * The Ultravisor is not involved in protecting the encrypted disk of
+ the SVM while at rest.
+
+ * For virtual I/O to work bounce buffering must be done.
+
+ * The Ultravisor uses AES (IAPM) for protection of SVM memory. IAPM
+ is a mode of AES that provides integrity and secrecy concurrently.
+
+ * The movement of data between normal and secure pages is coordinated
+ with the Ultravisor by a new HMM plug-in in the Hypervisor.
+
+ The Ultravisor offers new services to the hypervisor and SVMs. These
+ are accessed through ultracalls.
+
+Terminology
+===========
+
+ * Hypercalls: special system calls used to request services from
+ Hypervisor.
+
+ * Normal memory: Memory that is accessible to Hypervisor.
+
+ * Normal page: Page backed by normal memory and available to
+ Hypervisor.
+
+ * Shared page: A page backed by normal memory and available to both
+ the Hypervisor/QEMU and the SVM (i.e page has mappings in SVM and
+ Hypervisor/QEMU).
+
+ * Secure memory: Memory that is accessible only to Ultravisor and
+ SVMs.
+
+ * Secure page: Page backed by secure memory and only available to
+ Ultravisor and SVM.
+
+ * SVM: Secure Virtual Machine.
+
+ * Ultracalls: special system calls used to request services from
+ Ultravisor.
+
+
+Ultravisor calls API
+####################
+
+ This section describes Ultravisor calls (ultracalls) needed to
+ support Secure Virtual Machines (SVM)s and Paravirtalized KVM. The
+ ultracalls allow the SVMs and Hypervisor to request services from the
+ Ultravisor such as accessing a register or memory region that can only
+ be accessed when running in Ultravisor-privileged mode.
+
+ The specific service needed from an ultracall is specified in register
+ R3 (the first parameter to the ultracall). Other parameters to the
+ ultracall, if any, are specified in registers R4 through R12.
+
+ Return value of all ultracalls is in register R3. Other output values
+ from the ultracall, if any, are returned in registers R4 through R12.
+ The only exception to this register usage is the ``UV_RETURN``
+ ultracall described below.
+
+ Each ultracall returns specific error codes, applicable in the context
+ of the ultracall. However, like with the PowerPC Architecture Platform
+ Reference (PAPR), if no specific error code is defined for a
+ particular situation, then the ultracall will fallback to an erroneous
+ parameter-position based code. i.e U_PARAMETER, U_P2, U_P3 etc
+ depending on the ultracall parameter that may have caused the error.
+
+ Some ultracalls involve transferring a page of data between Ultravisor
+ and Hypervisor. Secure pages that are transferred from secure memory
+ to normal memory may be encrypted using dynamically generated keys.
+ When the secure pages are transferred back to secure memory, they may
+ be decrypted using the same dynamically generated keys. Generation and
+ management of these keys will be covered in a separate document.
+
+ For now this only covers ultracalls currently implemented and being
+ used by Hypervisor and SVMs but others can be added here when it
+ makes sense.
+
+ The full specification for all hypercalls/ultracalls will eventually
+ be made available in the public/OpenPower version of the PAPR
+ specification.
+
+ **Note**
+
+ If PEF is not enabled, the ultracalls will be redirected to the
+ Hypervisor which must handle/fail the calls.
+
+Ultracalls used by Hypervisor
+=============================
+
+ This section describes the virtual memory management ultracalls used
+ by the Hypervisor to manage SVMs.
+
+UV_PAGE_OUT
+-----------
+
+ Encrypt and move the contents of a page from secure memory to normal
+ memory.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_PAGE_OUT,
+ uint16_t lpid, /* LPAR ID */
+ uint64_t dest_ra, /* real address of destination page */
+ uint64_t src_gpa, /* source guest-physical-address */
+ uint8_t flags, /* flags */
+ uint64_t order) /* page size order */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_P2 if ``dest_ra`` is invalid.
+ * U_P3 if the ``src_gpa`` address is invalid.
+ * U_P4 if any bit in the ``flags`` is unrecognized
+ * U_P5 if the ``order`` parameter is unsupported.
+ * U_FUNCTION if functionality is not supported.
+ * U_BUSY if page cannot be currently paged-out.
+
+Description
+~~~~~~~~~~~
+
+ Encrypt the contents of a secure-page and make it available to
+ Hypervisor in a normal page.
+
+ By default, the source page is unmapped from the SVM's partition-
+ scoped page table. But the Hypervisor can provide a hint to the
+ Ultravisor to retain the page mapping by setting the ``UV_SNAPSHOT``
+ flag in ``flags`` parameter.
+
+ If the source page is already a shared page the call returns
+ U_SUCCESS, without doing anything.
+
+Use cases
+~~~~~~~~~
+
+ #. QEMU attempts to access an address belonging to the SVM but the
+ page frame for that address is not mapped into QEMU's address
+ space. In this case, the Hypervisor will allocate a page frame,
+ map it into QEMU's address space and issue the ``UV_PAGE_OUT``
+ call to retrieve the encrypted contents of the page.
+
+ #. When Ultravisor runs low on secure memory and it needs to page-out
+ an LRU page. In this case, Ultravisor will issue the
+ ``H_SVM_PAGE_OUT`` hypercall to the Hypervisor. The Hypervisor will
+ then allocate a normal page and issue the ``UV_PAGE_OUT`` ultracall
+ and the Ultravisor will encrypt and move the contents of the secure
+ page into the normal page.
+
+
+UV_PAGE_IN
+----------
+
+ Move the contents of a page from normal memory to secure memory.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_PAGE_IN,
+ uint16_t lpid, /* the LPAR ID */
+ uint64_t src_ra, /* source real address of page */
+ uint64_t dest_gpa, /* destination guest physical address */
+ uint64_t flags, /* flags */
+ uint64_t order) /* page size order */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_BUSY if page cannot be currently paged-in.
+ * U_FUNCTION if functionality is not supported
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_P2 if ``src_ra`` is invalid.
+ * U_P3 if the ``dest_gpa`` address is invalid.
+ * U_P4 if any bit in the ``flags`` is unrecognized
+ * U_P5 if the ``order`` parameter is unsupported.
+
+Description
+~~~~~~~~~~~
+
+ Move the contents of the page identified by ``src_ra`` from normal
+ memory to secure memory and map it to the guest physical address
+ ``dest_gpa``.
+
+ If `dest_gpa` refers to a shared address, map the page into the
+ partition-scoped page-table of the SVM. If `dest_gpa` is not shared,
+ copy the contents of the page into the corresponding secure page.
+ Depending on the context, decrypt the page before being copied.
+
+ The caller provides the attributes of the page through the ``flags``
+ parameter. Valid values for ``flags`` are:
+
+ * CACHE_INHIBITED
+ * CACHE_ENABLED
+ * WRITE_PROTECTION
+
+ The Hypervisor must pin the page in memory before making
+ ``UV_PAGE_IN`` ultracall.
+
+Use cases
+~~~~~~~~~
+
+ #. When a normal VM switches to secure mode, all its pages residing
+ in normal memory, are moved into secure memory.
+
+ #. When an SVM requests to share a page with Hypervisor the Hypervisor
+ allocates a page and informs the Ultravisor.
+
+ #. When an SVM accesses a secure page that has been paged-out,
+ Ultravisor invokes the Hypervisor to locate the page. After
+ locating the page, the Hypervisor uses UV_PAGE_IN to make the
+ page available to Ultravisor.
+
+ #. When Hypervisor accesses SVM data, the Hypervisor requests the
+ Ultravisor to transfer the corresponding page into a insecure page,
+ which the Hypervisor can access. The data in the normal page will
+ be encrypted though.
+
+UV_PAGE_INVAL
+-------------
+
+ Invalidate the Ultravisor mapping of a page.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_PAGE_INVAL,
+ uint16_t lpid, /* the LPAR ID */
+ uint64_t guest_pa, /* destination guest-physical-address */
+ uint64_t order) /* page size order */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_P2 if ``guest_pa`` is invalid (or corresponds to a secure
+ page mapping).
+ * U_P3 if the ``order`` is invalid.
+ * U_FUNCTION if functionality is not supported.
+ * U_BUSY if page cannot be currently invalidated.
+
+Description
+~~~~~~~~~~~
+
+ This ultracall informs Ultravisor that the page mapping in Hypervisor
+ corresponding to the given guest physical address has been invalidated
+ and that the Ultravisor should not access the page. If the specified
+ ``guest_pa`` corresponds to a secure page, Ultravisor will ignore the
+ attempt to invalidate the page and return U_P2.
+
+Use cases
+~~~~~~~~~
+
+ #. When a shared page is unmapped from the QEMU's page table, possibly
+ because it is paged-out to disk, Ultravisor needs to know that the
+ page should not be accessed from its side too.
+
+
+UV_WRITE_PATE
+-------------
+
+ Validate and write the partition table entry (PATE) for a given
+ partition.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_WRITE_PATE,
+ uint32_t lpid, /* the LPAR ID */
+ uint64_t dw0 /* the first double word to write */
+ uint64_t dw1) /* the second double word to write */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_BUSY if PATE cannot be currently written to.
+ * U_FUNCTION if functionality is not supported.
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_P2 if ``dw0`` is invalid.
+ * U_P3 if the ``dw1`` address is invalid.
+ * U_PERMISSION if the Hypervisor is attempting to change the PATE
+ of a secure virtual machine or if called from a
+ context other than Hypervisor.
+
+Description
+~~~~~~~~~~~
+
+ Validate and write a LPID and its partition-table-entry for the given
+ LPID. If the LPID is already allocated and initialized, this call
+ results in changing the partition table entry.
+
+Use cases
+~~~~~~~~~
+
+ #. The Partition table resides in Secure memory and its entries,
+ called PATE (Partition Table Entries), point to the partition-
+ scoped page tables for the Hypervisor as well as each of the
+ virtual machines (both secure and normal). The Hypervisor
+ operates in partition 0 and its partition-scoped page tables
+ reside in normal memory.
+
+ #. This ultracall allows the Hypervisor to register the partition-
+ scoped and process-scoped page table entries for the Hypervisor
+ and other partitions (virtual machines) with the Ultravisor.
+
+ #. If the value of the PATE for an existing partition (VM) changes,
+ the TLB cache for the partition is flushed.
+
+ #. The Hypervisor is responsible for allocating LPID. The LPID and
+ its PATE entry are registered together. The Hypervisor manages
+ the PATE entries for a normal VM and can change the PATE entry
+ anytime. Ultravisor manages the PATE entries for an SVM and
+ Hypervisor is not allowed to modify them.
+
+UV_RETURN
+---------
+
+ Return control from the Hypervisor back to the Ultravisor after
+ processing an hypercall or interrupt that was forwarded (aka
+ *reflected*) to the Hypervisor.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_RETURN)
+
+Return values
+~~~~~~~~~~~~~
+
+ This call never returns to Hypervisor on success. It returns
+ U_INVALID if ultracall is not made from a Hypervisor context.
+
+Description
+~~~~~~~~~~~
+
+ When an SVM makes an hypercall or incurs some other exception, the
+ Ultravisor usually forwards (aka *reflects*) the exceptions to the
+ Hypervisor. After processing the exception, Hypervisor uses the
+ ``UV_RETURN`` ultracall to return control back to the SVM.
+
+ The expected register state on entry to this ultracall is:
+
+ * Non-volatile registers are restored to their original values.
+ * If returning from an hypercall, register R0 contains the return
+ value (**unlike other ultracalls**) and, registers R4 through R12
+ contain any output values of the hypercall.
+ * R3 contains the ultracall number, i.e UV_RETURN.
+ * If returning with a synthesized interrupt, R2 contains the
+ synthesized interrupt number.
+
+Use cases
+~~~~~~~~~
+
+ #. Ultravisor relies on the Hypervisor to provide several services to
+ the SVM such as processing hypercall and other exceptions. After
+ processing the exception, Hypervisor uses UV_RETURN to return
+ control back to the Ultravisor.
+
+ #. Hypervisor has to use this ultracall to return control to the SVM.
+
+
+UV_REGISTER_MEM_SLOT
+--------------------
+
+ Register an SVM address-range with specified properties.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_REGISTER_MEM_SLOT,
+ uint64_t lpid, /* LPAR ID of the SVM */
+ uint64_t start_gpa, /* start guest physical address */
+ uint64_t size, /* size of address range in bytes */
+ uint64_t flags /* reserved for future expansion */
+ uint16_t slotid) /* slot identifier */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_P2 if ``start_gpa`` is invalid.
+ * U_P3 if ``size`` is invalid.
+ * U_P4 if any bit in the ``flags`` is unrecognized.
+ * U_P5 if the ``slotid`` parameter is unsupported.
+ * U_PERMISSION if called from context other than Hypervisor.
+ * U_FUNCTION if functionality is not supported.
+
+
+Description
+~~~~~~~~~~~
+
+ Register a memory range for an SVM. The memory range starts at the
+ guest physical address ``start_gpa`` and is ``size`` bytes long.
+
+Use cases
+~~~~~~~~~
+
+
+ #. When a virtual machine goes secure, all the memory slots managed by
+ the Hypervisor move into secure memory. The Hypervisor iterates
+ through each of memory slots, and registers the slot with
+ Ultravisor. Hypervisor may discard some slots such as those used
+ for firmware (SLOF).
+
+ #. When new memory is hot-plugged, a new memory slot gets registered.
+
+
+UV_UNREGISTER_MEM_SLOT
+----------------------
+
+ Unregister an SVM address-range that was previously registered using
+ UV_REGISTER_MEM_SLOT.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_UNREGISTER_MEM_SLOT,
+ uint64_t lpid, /* LPAR ID of the SVM */
+ uint64_t slotid) /* reservation slotid */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_FUNCTION if functionality is not supported.
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_P2 if ``slotid`` is invalid.
+ * U_PERMISSION if called from context other than Hypervisor.
+
+Description
+~~~~~~~~~~~
+
+ Release the memory slot identified by ``slotid`` and free any
+ resources allocated towards the reservation.
+
+Use cases
+~~~~~~~~~
+
+ #. Memory hot-remove.
+
+
+UV_SVM_TERMINATE
+----------------
+
+ Terminate an SVM and release its resources.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_SVM_TERMINATE,
+ uint64_t lpid, /* LPAR ID of the SVM */)
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_FUNCTION if functionality is not supported.
+ * U_PARAMETER if ``lpid`` is invalid.
+ * U_INVALID if VM is not secure.
+ * U_PERMISSION if not called from a Hypervisor context.
+
+Description
+~~~~~~~~~~~
+
+ Terminate an SVM and release all its resources.
+
+Use cases
+~~~~~~~~~
+
+ #. Called by Hypervisor when terminating an SVM.
+
+
+Ultracalls used by SVM
+======================
+
+UV_SHARE_PAGE
+-------------
+
+ Share a set of guest physical pages with the Hypervisor.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_SHARE_PAGE,
+ uint64_t gfn, /* guest page frame number */
+ uint64_t num) /* number of pages of size PAGE_SIZE */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_FUNCTION if functionality is not supported.
+ * U_INVALID if the VM is not secure.
+ * U_PARAMETER if ``gfn`` is invalid.
+ * U_P2 if ``num`` is invalid.
+
+Description
+~~~~~~~~~~~
+
+ Share the ``num`` pages starting at guest physical frame number ``gfn``
+ with the Hypervisor. Assume page size is PAGE_SIZE bytes. Zero the
+ pages before returning.
+
+ If the address is already backed by a secure page, unmap the page and
+ back it with an insecure page, with the help of the Hypervisor. If it
+ is not backed by any page yet, mark the PTE as insecure and back it
+ with an insecure page when the address is accessed. If it is already
+ backed by an insecure page, zero the page and return.
+
+Use cases
+~~~~~~~~~
+
+ #. The Hypervisor cannot access the SVM pages since they are backed by
+ secure pages. Hence an SVM must explicitly request Ultravisor for
+ pages it can share with Hypervisor.
+
+ #. Shared pages are needed to support virtio and Virtual Processor Area
+ (VPA) in SVMs.
+
+
+UV_UNSHARE_PAGE
+---------------
+
+ Restore a shared SVM page to its initial state.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_UNSHARE_PAGE,
+ uint64_t gfn, /* guest page frame number */
+ uint73 num) /* number of pages of size PAGE_SIZE*/
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_FUNCTION if functionality is not supported.
+ * U_INVALID if VM is not secure.
+ * U_PARAMETER if ``gfn`` is invalid.
+ * U_P2 if ``num`` is invalid.
+
+Description
+~~~~~~~~~~~
+
+ Stop sharing ``num`` pages starting at ``gfn`` with the Hypervisor.
+ Assume that the page size is PAGE_SIZE. Zero the pages before
+ returning.
+
+ If the address is already backed by an insecure page, unmap the page
+ and back it with a secure page. Inform the Hypervisor to release
+ reference to its shared page. If the address is not backed by a page
+ yet, mark the PTE as secure and back it with a secure page when that
+ address is accessed. If it is already backed by an secure page zero
+ the page and return.
+
+Use cases
+~~~~~~~~~
+
+ #. The SVM may decide to unshare a page from the Hypervisor.
+
+
+UV_UNSHARE_ALL_PAGES
+--------------------
+
+ Unshare all pages the SVM has shared with Hypervisor.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_UNSHARE_ALL_PAGES)
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success.
+ * U_FUNCTION if functionality is not supported.
+ * U_INVAL if VM is not secure.
+
+Description
+~~~~~~~~~~~
+
+ Unshare all shared pages from the Hypervisor. All unshared pages are
+ zeroed on return. Only pages explicitly shared by the SVM with the
+ Hypervisor (using UV_SHARE_PAGE ultracall) are unshared. Ultravisor
+ may internally share some pages with the Hypervisor without explicit
+ request from the SVM. These pages will not be unshared by this
+ ultracall.
+
+Use cases
+~~~~~~~~~
+
+ #. This call is needed when ``kexec`` is used to boot a different
+ kernel. It may also be needed during SVM reset.
+
+UV_ESM
+------
+
+ Secure the virtual machine (*enter secure mode*).
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t ultracall(const uint64_t UV_ESM,
+ uint64_t esm_blob_addr, /* location of the ESM blob */
+ unint64_t fdt) /* Flattened device tree */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * U_SUCCESS on success (including if VM is already secure).
+ * U_FUNCTION if functionality is not supported.
+ * U_INVALID if VM is not secure.
+ * U_PARAMETER if ``esm_blob_addr`` is invalid.
+ * U_P2 if ``fdt`` is invalid.
+ * U_PERMISSION if any integrity checks fail.
+ * U_RETRY insufficient memory to create SVM.
+ * U_NO_KEY symmetric key unavailable.
+
+Description
+~~~~~~~~~~~
+
+ Secure the virtual machine. On successful completion, return
+ control to the virtual machine at the address specified in the
+ ESM blob.
+
+Use cases
+~~~~~~~~~
+
+ #. A normal virtual machine can choose to switch to a secure mode.
+
+Hypervisor Calls API
+####################
+
+ This document describes the Hypervisor calls (hypercalls) that are
+ needed to support the Ultravisor. Hypercalls are services provided by
+ the Hypervisor to virtual machines and Ultravisor.
+
+ Register usage for these hypercalls is identical to that of the other
+ hypercalls defined in the Power Architecture Platform Reference (PAPR)
+ document. i.e on input, register R3 identifies the specific service
+ that is being requested and registers R4 through R11 contain
+ additional parameters to the hypercall, if any. On output, register
+ R3 contains the return value and registers R4 through R9 contain any
+ other output values from the hypercall.
+
+ This document only covers hypercalls currently implemented/planned
+ for Ultravisor usage but others can be added here when it makes sense.
+
+ The full specification for all hypercalls/ultracalls will eventually
+ be made available in the public/OpenPower version of the PAPR
+ specification.
+
+Hypervisor calls to support Ultravisor
+======================================
+
+ Following are the set of hypercalls needed to support Ultravisor.
+
+H_SVM_INIT_START
+----------------
+
+ Begin the process of converting a normal virtual machine into an SVM.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t hypercall(const uint64_t H_SVM_INIT_START)
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * H_SUCCESS on success.
+
+Description
+~~~~~~~~~~~
+
+ Initiate the process of securing a virtual machine. This involves
+ coordinating with the Ultravisor, using ultracalls, to allocate
+ resources in the Ultravisor for the new SVM, transferring the VM's
+ pages from normal to secure memory etc. When the process is
+ completed, Ultravisor issues the H_SVM_INIT_DONE hypercall.
+
+Use cases
+~~~~~~~~~
+
+ #. Ultravisor uses this hypercall to inform Hypervisor that a VM
+ has initiated the process of switching to secure mode.
+
+
+H_SVM_INIT_DONE
+---------------
+
+ Complete the process of securing an SVM.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t hypercall(const uint64_t H_SVM_INIT_DONE)
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * H_SUCCESS on success.
+ * H_UNSUPPORTED if called from the wrong context (e.g.
+ from an SVM or before an H_SVM_INIT_START
+ hypercall).
+
+Description
+~~~~~~~~~~~
+
+ Complete the process of securing a virtual machine. This call must
+ be made after a prior call to ``H_SVM_INIT_START`` hypercall.
+
+Use cases
+~~~~~~~~~
+
+ On successfully securing a virtual machine, the Ultravisor informs
+ Hypervisor about it. Hypervisor can use this call to finish setting
+ up its internal state for this virtual machine.
+
+
+H_SVM_PAGE_IN
+-------------
+
+ Move the contents of a page from normal memory to secure memory.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t hypercall(const uint64_t H_SVM_PAGE_IN,
+ uint64_t guest_pa, /* guest-physical-address */
+ uint64_t flags, /* flags */
+ uint64_t order) /* page size order */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * H_SUCCESS on success.
+ * H_PARAMETER if ``guest_pa`` is invalid.
+ * H_P2 if ``flags`` is invalid.
+ * H_P3 if ``order`` of page is invalid.
+
+Description
+~~~~~~~~~~~
+
+ Retrieve the content of the page, belonging to the VM at the specified
+ guest physical address.
+
+ Only valid value(s) in ``flags`` are:
+
+ * H_PAGE_IN_SHARED which indicates that the page is to be shared
+ with the Ultravisor.
+
+ * H_PAGE_IN_NONSHARED indicates that the UV is not anymore
+ interested in the page. Applicable if the page is a shared page.
+
+ The ``order`` parameter must correspond to the configured page size.
+
+Use cases
+~~~~~~~~~
+
+ #. When a normal VM becomes a secure VM (using the UV_ESM ultracall),
+ the Ultravisor uses this hypercall to move contents of each page of
+ the VM from normal memory to secure memory.
+
+ #. Ultravisor uses this hypercall to ask Hypervisor to provide a page
+ in normal memory that can be shared between the SVM and Hypervisor.
+
+ #. Ultravisor uses this hypercall to page-in a paged-out page. This
+ can happen when the SVM touches a paged-out page.
+
+ #. If SVM wants to disable sharing of pages with Hypervisor, it can
+ inform Ultravisor to do so. Ultravisor will then use this hypercall
+ and inform Hypervisor that it has released access to the normal
+ page.
+
+H_SVM_PAGE_OUT
+---------------
+
+ Move the contents of the page to normal memory.
+
+Syntax
+~~~~~~
+
+.. code-block:: c
+
+ uint64_t hypercall(const uint64_t H_SVM_PAGE_OUT,
+ uint64_t guest_pa, /* guest-physical-address */
+ uint64_t flags, /* flags (currently none) */
+ uint64_t order) /* page size order */
+
+Return values
+~~~~~~~~~~~~~
+
+ One of the following values:
+
+ * H_SUCCESS on success.
+ * H_PARAMETER if ``guest_pa`` is invalid.
+ * H_P2 if ``flags`` is invalid.
+ * H_P3 if ``order`` is invalid.
+
+Description
+~~~~~~~~~~~
+
+ Move the contents of the page identified by ``guest_pa`` to normal
+ memory.
+
+ Currently ``flags`` is unused and must be set to 0. The ``order``
+ parameter must correspond to the configured page size.
+
+Use cases
+~~~~~~~~~
+
+ #. If Ultravisor is running low on secure pages, it can move the
+ contents of some secure pages, into normal pages using this
+ hypercall. The content will be encrypted.
+
+References
+##########
+
+.. [1] `Supporting Protected Computing on IBM Power Architecture <https://developer.ibm.com/articles/l-support-protected-computing/>`_
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 1/7] Documentation/powerpc: Ultravisor API Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
2019-08-14 10:46 ` Michael Ellerman
2019-08-08 4:05 ` [PATCH v5 3/7] powerpc/powernv: Introduce FW_FEATURE_ULTRAVISOR Claudio Carvalho
` (4 subsequent siblings)
6 siblings, 1 reply; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
The ultracalls (ucalls for short) allow the Secure Virtual Machines
(SVM)s and hypervisor to request services from the ultravisor such as
accessing a register or memory region that can only be accessed when
running in ultravisor-privileged mode.
This patch adds the ucall_norets() ultravisor call handler. Like
plpar_hcall_norets(), it also saves and restores the Condition
Register (CR).
The specific service needed from an ucall is specified in register
R3 (the first parameter to the ucall). Other parameters to the
ucall, if any, are specified in registers R4 through R12.
Return value of all ucalls is in register R3. Other output values
from the ucall, if any, are returned in registers R4 through R12.
Each ucall returns specific error codes, applicable in the context
of the ucall. However, like with the PowerPC Architecture Platform
Reference (PAPR), if no specific error code is defined for a particular
situation, then the ucall will fallback to an erroneous
parameter-position based code. i.e U_PARAMETER, U_P2, U_P3 etc depending
on the ucall parameter that may have caused the error.
Every host kernel (powernv) needs to be able to do ucalls in case it
ends up being run in a machine with ultravisor enabled. Otherwise, the
kernel may crash early in boot trying to access ultravisor resources,
for instance, trying to set the partition table entry 0. Secure guests
also need to be able to do ucalls and its kernel may not have
CONFIG_PPC_POWERNV=y. For that reason, the ucall.S file is placed under
arch/powerpc/kernel.
If ultravisor is not enabled, the ucalls will be redirected to the
hypervisor which must handle/fail the call.
Thanks to inputs from Ram Pai and Michael Anderson.
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
---
Ultravisor call support for secure guests is being proposed as part of
the patchset "Secure Virtual Machine Enablement" posted by Thiago
Bauermann.
---
arch/powerpc/include/asm/asm-prototypes.h | 11 +++++++++++
arch/powerpc/include/asm/ultravisor-api.h | 23 +++++++++++++++++++++++
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/kernel/ucall.S | 20 ++++++++++++++++++++
4 files changed, 55 insertions(+)
create mode 100644 arch/powerpc/include/asm/ultravisor-api.h
create mode 100644 arch/powerpc/kernel/ucall.S
diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h
index 296584e6dd55..ee2e67d5a005 100644
--- a/arch/powerpc/include/asm/asm-prototypes.h
+++ b/arch/powerpc/include/asm/asm-prototypes.h
@@ -19,6 +19,7 @@
#include <asm/epapr_hcalls.h>
#include <asm/dcr.h>
#include <asm/mmu_context.h>
+#include <asm/ultravisor-api.h>
#include <uapi/asm/ucontext.h>
@@ -38,6 +39,16 @@ extern struct static_key hcall_tracepoint_key;
void __trace_hcall_entry(unsigned long opcode, unsigned long *args);
void __trace_hcall_exit(long opcode, long retval, unsigned long *retbuf);
+/* Ultravisor */
+#ifdef CONFIG_PPC_POWERNV
+long ucall_norets(unsigned long opcode, ...);
+#else
+static inline long ucall_norets(unsigned long opcode, ...)
+{
+ return U_NOT_AVAILABLE;
+}
+#endif
+
/* OPAL */
int64_t __opal_call(int64_t a0, int64_t a1, int64_t a2, int64_t a3,
int64_t a4, int64_t a5, int64_t a6, int64_t a7,
diff --git a/arch/powerpc/include/asm/ultravisor-api.h b/arch/powerpc/include/asm/ultravisor-api.h
new file mode 100644
index 000000000000..88ffa78f9d61
--- /dev/null
+++ b/arch/powerpc/include/asm/ultravisor-api.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Ultravisor API.
+ *
+ * Copyright 2019, IBM Corporation.
+ *
+ */
+#ifndef _ASM_POWERPC_ULTRAVISOR_API_H
+#define _ASM_POWERPC_ULTRAVISOR_API_H
+
+#include <asm/hvcall.h>
+
+/* Return codes */
+#define U_FUNCTION H_FUNCTION
+#define U_NOT_AVAILABLE H_NOT_AVAILABLE
+#define U_P2 H_P2
+#define U_P3 H_P3
+#define U_P4 H_P4
+#define U_P5 H_P5
+#define U_PARAMETER H_PARAMETER
+#define U_SUCCESS H_SUCCESS
+
+#endif /* _ASM_POWERPC_ULTRAVISOR_API_H */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 56dfa7a2a6f2..35379b632f3c 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -155,6 +155,7 @@ endif
obj-$(CONFIG_EPAPR_PARAVIRT) += epapr_paravirt.o epapr_hcalls.o
obj-$(CONFIG_KVM_GUEST) += kvm.o kvm_emul.o
+obj-$(CONFIG_PPC_POWERNV) += ucall.o
# Disable GCOV, KCOV & sanitizers in odd or sensitive code
GCOV_PROFILE_prom_init.o := n
diff --git a/arch/powerpc/kernel/ucall.S b/arch/powerpc/kernel/ucall.S
new file mode 100644
index 000000000000..de9133e45d21
--- /dev/null
+++ b/arch/powerpc/kernel/ucall.S
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Generic code to perform an ultravisor call.
+ *
+ * Copyright 2019, IBM Corporation.
+ *
+ */
+#include <asm/ppc_asm.h>
+#include <asm/export.h>
+
+_GLOBAL(ucall_norets)
+EXPORT_SYMBOL_GPL(ucall_norets)
+ mfcr r0
+ stw r0,8(r1)
+
+ sc 2 /* Invoke the ultravisor */
+
+ lwz r0,8(r1)
+ mtcrf 0xff,r0
+ blr /* Return r3 = status */
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v5 3/7] powerpc/powernv: Introduce FW_FEATURE_ULTRAVISOR
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 1/7] Documentation/powerpc: Ultravisor API Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE Claudio Carvalho
` (3 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
In PEF enabled systems, some of the resources which were previously
hypervisor privileged are now ultravisor privileged and controlled by
the ultravisor firmware.
This adds FW_FEATURE_ULTRAVISOR to indicate if PEF is enabled.
The host kernel can use FW_FEATURE_ULTRAVISOR, for instance, to skip
accessing resources (e.g. PTCR and LDBAR) in case PEF is enabled.
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
[ andmike: Device node name to "ibm,ultravisor" ]
Signed-off-by: Michael Anderson <andmike@linux.ibm.com>
---
arch/powerpc/include/asm/firmware.h | 5 +++--
arch/powerpc/include/asm/ultravisor.h | 14 ++++++++++++
arch/powerpc/kernel/prom.c | 4 ++++
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/ultravisor.c | 24 +++++++++++++++++++++
5 files changed, 46 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/include/asm/ultravisor.h
create mode 100644 arch/powerpc/platforms/powernv/ultravisor.c
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 00bc42d95679..43b48c4d3ca9 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -54,6 +54,7 @@
#define FW_FEATURE_DRC_INFO ASM_CONST(0x0000000800000000)
#define FW_FEATURE_BLOCK_REMOVE ASM_CONST(0x0000001000000000)
#define FW_FEATURE_PAPR_SCM ASM_CONST(0x0000002000000000)
+#define FW_FEATURE_ULTRAVISOR ASM_CONST(0x0000004000000000)
#ifndef __ASSEMBLY__
@@ -72,9 +73,9 @@ enum {
FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN |
FW_FEATURE_HPT_RESIZE | FW_FEATURE_DRMEM_V2 |
FW_FEATURE_DRC_INFO | FW_FEATURE_BLOCK_REMOVE |
- FW_FEATURE_PAPR_SCM,
+ FW_FEATURE_PAPR_SCM | FW_FEATURE_ULTRAVISOR,
FW_FEATURE_PSERIES_ALWAYS = 0,
- FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL,
+ FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_ULTRAVISOR,
FW_FEATURE_POWERNV_ALWAYS = 0,
FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
diff --git a/arch/powerpc/include/asm/ultravisor.h b/arch/powerpc/include/asm/ultravisor.h
new file mode 100644
index 000000000000..dc6e1ea198f2
--- /dev/null
+++ b/arch/powerpc/include/asm/ultravisor.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Ultravisor definitions
+ *
+ * Copyright 2019, IBM Corporation.
+ *
+ */
+#ifndef _ASM_POWERPC_ULTRAVISOR_H
+#define _ASM_POWERPC_ULTRAVISOR_H
+
+int early_init_dt_scan_ultravisor(unsigned long node, const char *uname,
+ int depth, void *data);
+
+#endif /* _ASM_POWERPC_ULTRAVISOR_H */
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 4221527b082f..67a2c1b39252 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -59,6 +59,7 @@
#include <asm/firmware.h>
#include <asm/dt_cpu_ftrs.h>
#include <asm/drmem.h>
+#include <asm/ultravisor.h>
#include <mm/mmu_decl.h>
@@ -706,6 +707,9 @@ void __init early_init_devtree(void *params)
#ifdef CONFIG_PPC_POWERNV
/* Some machines might need OPAL info for debugging, grab it now. */
of_scan_flat_dt(early_init_dt_scan_opal, NULL);
+
+ /* Scan tree for ultravisor feature */
+ of_scan_flat_dt(early_init_dt_scan_ultravisor, NULL);
#endif
#ifdef CONFIG_FA_DUMP
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index da2e99efbd04..2c27c8ac00c8 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -4,6 +4,7 @@ obj-y += idle.o opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
obj-y += rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o
obj-y += opal-msglog.o opal-hmi.o opal-power.o opal-irqchip.o
obj-y += opal-kmsg.o opal-powercap.o opal-psr.o opal-sensor-groups.o
+obj-y += ultravisor.o
obj-$(CONFIG_SMP) += smp.o subcore.o subcore-asm.o
obj-$(CONFIG_PCI) += pci.o pci-ioda.o npu-dma.o pci-ioda-tce.o
diff --git a/arch/powerpc/platforms/powernv/ultravisor.c b/arch/powerpc/platforms/powernv/ultravisor.c
new file mode 100644
index 000000000000..02ac57b4bded
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/ultravisor.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Ultravisor high level interfaces
+ *
+ * Copyright 2019, IBM Corporation.
+ *
+ */
+#include <linux/init.h>
+#include <linux/printk.h>
+#include <linux/of_fdt.h>
+
+#include <asm/ultravisor.h>
+#include <asm/firmware.h>
+
+int __init early_init_dt_scan_ultravisor(unsigned long node, const char *uname,
+ int depth, void *data)
+{
+ if (!of_flat_dt_is_compatible(node, "ibm,ultravisor"))
+ return 0;
+
+ powerpc_firmware_features |= FW_FEATURE_ULTRAVISOR;
+ pr_debug("Ultravisor detected!\n");
+ return 1;
+}
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
` (2 preceding siblings ...)
2019-08-08 4:05 ` [PATCH v5 3/7] powerpc/powernv: Introduce FW_FEATURE_ULTRAVISOR Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
2019-08-14 11:33 ` Michael Ellerman
2019-08-08 4:05 ` [PATCH v5 5/7] powerpc/mm: Write to PTCR only if ultravisor disabled Claudio Carvalho
` (2 subsequent siblings)
6 siblings, 1 reply; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Ryan Grimm, Madhavan Srinivasan, Michael Anderson, Ram Pai,
Claudio Carvalho, kvm-ppc, Bharata B Rao, Ryan Grimm,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
From: Michael Anderson <andmike@linux.ibm.com>
In ultravisor enabled systems, the ultravisor creates and maintains the
partition table in secure memory where the hypervisor cannot access, and
therefore, the hypervisor have to do the UV_WRITE_PATE ucall whenever it
wants to set a partition table entry (PATE).
This patch adds the UV_WRITE_PATE ucall and uses it to set a PATE if
ultravisor is enabled. Additionally, this also also keeps a copy of the
partition table because the nestMMU does not have access to secure
memory. Such copy has entries for nonsecure and hypervisor partition.
Signed-off-by: Michael Anderson <andmike@linux.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
[ cclaudio: Write the PATE in HV's table before doing that in UV's ]
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
Reviewed-by: Ryan Grimm <grimm@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/ultravisor-api.h | 5 ++
arch/powerpc/include/asm/ultravisor.h | 8 +++
arch/powerpc/mm/book3s64/pgtable.c | 60 ++++++++++++++++-------
3 files changed, 56 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/ultravisor-api.h b/arch/powerpc/include/asm/ultravisor-api.h
index 88ffa78f9d61..8cd49abff4f3 100644
--- a/arch/powerpc/include/asm/ultravisor-api.h
+++ b/arch/powerpc/include/asm/ultravisor-api.h
@@ -11,6 +11,7 @@
#include <asm/hvcall.h>
/* Return codes */
+#define U_BUSY H_BUSY
#define U_FUNCTION H_FUNCTION
#define U_NOT_AVAILABLE H_NOT_AVAILABLE
#define U_P2 H_P2
@@ -18,6 +19,10 @@
#define U_P4 H_P4
#define U_P5 H_P5
#define U_PARAMETER H_PARAMETER
+#define U_PERMISSION H_PERMISSION
#define U_SUCCESS H_SUCCESS
+/* opcodes */
+#define UV_WRITE_PATE 0xF104
+
#endif /* _ASM_POWERPC_ULTRAVISOR_API_H */
diff --git a/arch/powerpc/include/asm/ultravisor.h b/arch/powerpc/include/asm/ultravisor.h
index dc6e1ea198f2..6fe1f365dec8 100644
--- a/arch/powerpc/include/asm/ultravisor.h
+++ b/arch/powerpc/include/asm/ultravisor.h
@@ -8,7 +8,15 @@
#ifndef _ASM_POWERPC_ULTRAVISOR_H
#define _ASM_POWERPC_ULTRAVISOR_H
+#include <asm/asm-prototypes.h>
+#include <asm/ultravisor-api.h>
+
int early_init_dt_scan_ultravisor(unsigned long node, const char *uname,
int depth, void *data);
+static inline int uv_register_pate(u64 lpid, u64 dw0, u64 dw1)
+{
+ return ucall_norets(UV_WRITE_PATE, lpid, dw0, dw1);
+}
+
#endif /* _ASM_POWERPC_ULTRAVISOR_H */
diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c
index 85bc81abd286..033731f5dbaa 100644
--- a/arch/powerpc/mm/book3s64/pgtable.c
+++ b/arch/powerpc/mm/book3s64/pgtable.c
@@ -16,6 +16,8 @@
#include <asm/tlb.h>
#include <asm/trace.h>
#include <asm/powernv.h>
+#include <asm/firmware.h>
+#include <asm/ultravisor.h>
#include <mm/mmu_decl.h>
#include <trace/events/thp.h>
@@ -198,7 +200,15 @@ void __init mmu_partition_table_init(void)
unsigned long ptcr;
BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");
- /* Initialize the Partition Table with no entries */
+ /*
+ * Initialize the Partition Table with no entries, even in the presence
+ * of an ultravisor firmware.
+ *
+ * In ultravisor enabled systems, the ultravisor creates and maintains
+ * the partition table in secure memory. However, we keep a copy of the
+ * partition table because nestMMU cannot access secure memory. Our copy
+ * contains entries for nonsecure and hypervisor partition.
+ */
partition_tb = memblock_alloc(patb_size, patb_size);
if (!partition_tb)
panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
@@ -213,34 +223,50 @@ void __init mmu_partition_table_init(void)
powernv_set_nmmu_ptcr(ptcr);
}
-void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
- unsigned long dw1)
+/*
+ * Global flush of TLBs and partition table caches for this lpid. The type of
+ * flush (hash or radix) depends on what the previous use of this partition ID
+ * was, not the new use.
+ */
+static void flush_partition(unsigned int lpid, unsigned long old_patb0)
{
- unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
-
- partition_tb[lpid].patb0 = cpu_to_be64(dw0);
- partition_tb[lpid].patb1 = cpu_to_be64(dw1);
-
- /*
- * Global flush of TLBs and partition table caches for this lpid.
- * The type of flush (hash or radix) depends on what the previous
- * use of this partition ID was, not the new use.
- */
asm volatile("ptesync" : : : "memory");
- if (old & PATB_HR) {
- asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
+ if (old_patb0 & PATB_HR) {
+ asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 1) : :
"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
- asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
+ asm volatile(PPC_TLBIE_5(%0, %1, 2, 1, 1) : :
"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
} else {
- asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
+ asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 0) : :
"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
}
/* do we need fixup here ?*/
asm volatile("eieio; tlbsync; ptesync" : : : "memory");
}
+
+void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
+ unsigned long dw1)
+{
+ unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
+
+ partition_tb[lpid].patb0 = cpu_to_be64(dw0);
+ partition_tb[lpid].patb1 = cpu_to_be64(dw1);
+
+ /*
+ * In ultravisor enabled systems, the ultravisor maintains the partition
+ * table in secure memory where we don't have access, therefore, we have
+ * to do a ucall to set an entry.
+ */
+ if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) {
+ uv_register_pate(lpid, dw0, dw1);
+ pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",
+ dw0, dw1);
+ } else {
+ flush_partition(lpid, old);
+ }
+}
EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
static pmd_t *get_pmd_from_cache(struct mm_struct *mm)
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v5 5/7] powerpc/mm: Write to PTCR only if ultravisor disabled
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
` (3 preceding siblings ...)
2019-08-08 4:05 ` [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
2019-08-14 12:04 ` Michael Ellerman
2019-08-08 4:05 ` [PATCH v5 6/7] powerpc/powernv: Access LDBAR " Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 7/7] powerpc/kvm: Use UV_RETURN ucall to return to ultravisor Claudio Carvalho
6 siblings, 1 reply; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
In ultravisor enabled systems, PTCR becomes ultravisor privileged only
for writing and an attempt to write to it will cause a Hypervisor
Emulation Assitance interrupt.
This patch adds the try_set_ptcr(val) macro as an accessor to
mtspr(SPRN_PTCR, val), which will be executed only if ultravisor
disabled.
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
---
arch/powerpc/include/asm/reg.h | 13 +++++++++++++
arch/powerpc/mm/book3s64/hash_utils.c | 4 ++--
arch/powerpc/mm/book3s64/pgtable.c | 2 +-
arch/powerpc/mm/book3s64/radix_pgtable.c | 6 +++---
4 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 10caa145f98b..14139b1ebdb8 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -15,6 +15,7 @@
#include <asm/cputable.h>
#include <asm/asm-const.h>
#include <asm/feature-fixups.h>
+#include <asm/firmware.h>
/* Pickup Book E specific registers. */
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
@@ -1452,6 +1453,18 @@ static inline void update_power8_hid0(unsigned long hid0)
*/
asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0));
}
+
+/*
+ * In ultravisor enabled systems, PTCR becomes ultravisor privileged only for
+ * writing and an attempt to write to it will cause a Hypervisor Emulation
+ * Assistance interrupt.
+ */
+#define try_set_ptcr(val) \
+ do { \
+ if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) \
+ mtspr(SPRN_PTCR, val); \
+ } while (0)
+
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_REG_H */
diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
index 25a2cf32d544..048b7f58deae 100644
--- a/arch/powerpc/mm/book3s64/hash_utils.c
+++ b/arch/powerpc/mm/book3s64/hash_utils.c
@@ -1079,8 +1079,8 @@ void hash__early_init_mmu_secondary(void)
if (!cpu_has_feature(CPU_FTR_ARCH_300))
mtspr(SPRN_SDR1, _SDR1);
else
- mtspr(SPRN_PTCR,
- __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
+ try_set_ptcr(__pa(partition_tb) |
+ (PATB_SIZE_SHIFT - 12));
}
/* Initialize SLB */
slb_initialize();
diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c
index 033731f5dbaa..016c6ccb5b81 100644
--- a/arch/powerpc/mm/book3s64/pgtable.c
+++ b/arch/powerpc/mm/book3s64/pgtable.c
@@ -219,7 +219,7 @@ void __init mmu_partition_table_init(void)
* 64 K size.
*/
ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);
- mtspr(SPRN_PTCR, ptcr);
+ try_set_ptcr(ptcr);
powernv_set_nmmu_ptcr(ptcr);
}
diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
index e92c6472a20c..246b32550eab 100644
--- a/arch/powerpc/mm/book3s64/radix_pgtable.c
+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
@@ -654,8 +654,8 @@ void radix__early_init_mmu_secondary(void)
lpcr = mfspr(SPRN_LPCR);
mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
- mtspr(SPRN_PTCR,
- __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
+ try_set_ptcr(__pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
+
radix_init_amor();
}
@@ -671,7 +671,7 @@ void radix__mmu_cleanup_all(void)
if (!firmware_has_feature(FW_FEATURE_LPAR)) {
lpcr = mfspr(SPRN_LPCR);
mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT);
- mtspr(SPRN_PTCR, 0);
+ try_set_ptcr(0);
powernv_set_nmmu_ptcr(0);
radix__flush_tlb_all();
}
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v5 6/7] powerpc/powernv: Access LDBAR only if ultravisor disabled
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
` (4 preceding siblings ...)
2019-08-08 4:05 ` [PATCH v5 5/7] powerpc/mm: Write to PTCR only if ultravisor disabled Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 7/7] powerpc/kvm: Use UV_RETURN ucall to return to ultravisor Claudio Carvalho
6 siblings, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
LDBAR is a per-thread SPR populated and used by the thread-imc pmu
driver to dump the data counter into memory. It contains memory along
with few other configuration bits. LDBAR is populated and enabled only
when any of the thread imc pmu events are monitored.
In ultravisor enabled systems, LDBAR becomes ultravisor privileged and
an attempt to write to it will cause a Hypervisor Emulation Assistance
interrupt.
In ultravisor enabled systems, the ultravisor is responsible to maintain
the LDBAR (e.g. save and restore it).
This restricts LDBAR access to only when ultravisor is disabled.
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
Reviewed-by: Ryan Grimm <grimm@linux.ibm.com>
---
arch/powerpc/platforms/powernv/idle.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 210fb73a5121..14018463a8f0 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on)
sprs.ptcr = mfspr(SPRN_PTCR);
sprs.rpr = mfspr(SPRN_RPR);
sprs.tscr = mfspr(SPRN_TSCR);
- sprs.ldbar = mfspr(SPRN_LDBAR);
+ if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
+ sprs.ldbar = mfspr(SPRN_LDBAR);
sprs_saved = true;
@@ -793,7 +794,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on)
mtspr(SPRN_MMCR0, sprs.mmcr0);
mtspr(SPRN_MMCR1, sprs.mmcr1);
mtspr(SPRN_MMCR2, sprs.mmcr2);
- mtspr(SPRN_LDBAR, sprs.ldbar);
+ if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
+ mtspr(SPRN_LDBAR, sprs.ldbar);
mtspr(SPRN_SPRG3, local_paca->sprg_vdso);
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v5 7/7] powerpc/kvm: Use UV_RETURN ucall to return to ultravisor
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
` (5 preceding siblings ...)
2019-08-08 4:05 ` [PATCH v5 6/7] powerpc/powernv: Access LDBAR " Claudio Carvalho
@ 2019-08-08 4:05 ` Claudio Carvalho
6 siblings, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-08 4:05 UTC (permalink / raw)
To: linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
From: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
When an SVM makes an hypercall or incurs some other exception, the
Ultravisor usually forwards (a.k.a. reflects) the exceptions to the
Hypervisor. After processing the exception, Hypervisor uses the
UV_RETURN ultracall to return control back to the SVM.
The expected register state on entry to this ultracall is:
* Non-volatile registers are restored to their original values.
* If returning from an hypercall, register R0 contains the return value
(unlike other ultracalls) and, registers R4 through R12 contain any
output values of the hypercall.
* R3 contains the ultracall number, i.e UV_RETURN.
* If returning with a synthesized interrupt, R2 contains the
synthesized interrupt number.
Thanks to input from Paul Mackerras, Ram Pai and Mike Anderson.
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/include/asm/ultravisor-api.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 39 +++++++++++++++++++----
4 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 013c76a0a03e..184becb62ea4 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -294,6 +294,7 @@ struct kvm_arch {
cpumask_t cpu_in_guest;
u8 radix;
u8 fwnmi_enabled;
+ u8 secure_guest;
bool threads_indep;
bool nested_enable;
pgd_t *pgtable;
diff --git a/arch/powerpc/include/asm/ultravisor-api.h b/arch/powerpc/include/asm/ultravisor-api.h
index 8cd49abff4f3..6a0f9c74f959 100644
--- a/arch/powerpc/include/asm/ultravisor-api.h
+++ b/arch/powerpc/include/asm/ultravisor-api.h
@@ -24,5 +24,6 @@
/* opcodes */
#define UV_WRITE_PATE 0xF104
+#define UV_RETURN 0xF11C
#endif /* _ASM_POWERPC_ULTRAVISOR_API_H */
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 524a7bba0ee5..aadc6176824b 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -510,6 +510,7 @@ int main(void)
OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
OFFSET(KVM_RADIX, kvm, arch.radix);
OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
+ OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest);
OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index bc18366cd1ba..0a5b2a8236c7 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -36,6 +36,7 @@
#include <asm/asm-compat.h>
#include <asm/feature-fixups.h>
#include <asm/cpuidle.h>
+#include <asm/ultravisor-api.h>
/* Sign-extend HDEC if not on POWER9 */
#define EXTEND_HDEC(reg) \
@@ -1090,16 +1091,10 @@ BEGIN_FTR_SECTION
END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
ld r5, VCPU_LR(r4)
- ld r6, VCPU_CR(r4)
mtlr r5
- mtcr r6
ld r1, VCPU_GPR(R1)(r4)
- ld r2, VCPU_GPR(R2)(r4)
- ld r3, VCPU_GPR(R3)(r4)
ld r5, VCPU_GPR(R5)(r4)
- ld r6, VCPU_GPR(R6)(r4)
- ld r7, VCPU_GPR(R7)(r4)
ld r8, VCPU_GPR(R8)(r4)
ld r9, VCPU_GPR(R9)(r4)
ld r10, VCPU_GPR(R10)(r4)
@@ -1117,10 +1112,42 @@ BEGIN_FTR_SECTION
mtspr SPRN_HDSISR, r0
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
+ ld r6, VCPU_KVM(r4)
+ lbz r7, KVM_SECURE_GUEST(r6)
+ cmpdi r7, 0
+ ld r6, VCPU_GPR(R6)(r4)
+ ld r7, VCPU_GPR(R7)(r4)
+ bne ret_to_ultra
+
+ lwz r0, VCPU_CR(r4)
+ mtcr r0
+
ld r0, VCPU_GPR(R0)(r4)
+ ld r2, VCPU_GPR(R2)(r4)
+ ld r3, VCPU_GPR(R3)(r4)
ld r4, VCPU_GPR(R4)(r4)
HRFI_TO_GUEST
b .
+/*
+ * Use UV_RETURN ultracall to return control back to the Ultravisor after
+ * processing an hypercall or interrupt that was forwarded (a.k.a. reflected)
+ * to the Hypervisor.
+ *
+ * All registers have already been loaded, except:
+ * R0 = hcall result
+ * R2 = SRR1, so UV can detect a synthesized interrupt (if any)
+ * R3 = UV_RETURN
+ */
+ret_to_ultra:
+ lwz r0, VCPU_CR(r4)
+ mtcr r0
+
+ ld r0, VCPU_GPR(R3)(r4)
+ mfspr r2, SPRN_SRR1
+ li r3, 0
+ ori r3, r3, UV_RETURN
+ ld r4, VCPU_GPR(R4)(r4)
+ sc 2
/*
* Enter the guest on a P9 or later system where we have exactly
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API
2019-08-08 4:05 ` [PATCH v5 1/7] Documentation/powerpc: Ultravisor API Claudio Carvalho
@ 2019-08-09 12:45 ` Michael Ellerman
2019-08-21 22:30 ` Claudio Carvalho
2019-08-12 15:58 ` Fabiano Rosas
1 sibling, 1 reply; 20+ messages in thread
From: Michael Ellerman @ 2019-08-09 12:45 UTC (permalink / raw)
To: Claudio Carvalho, linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Ram Pai, Sukadev Bhattiprolu,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
Claudio Carvalho <cclaudio@linux.ibm.com> writes:
> From: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
>
> POWER9 processor includes support for Protected Execution Facility (PEF).
Which POWER9? Please be more precise.
It's public knowledge that some versions of Power9 don't have PEF (or
have it broken / fused off).
People are going to try and test this on various chip revisions that are
out in the wild, we need to make it clear where it's expected to work
and where it's not.
> Attached documentation provides an overview of PEF and defines the API
> for various interfaces that must be implemented in the Ultravisor
> firmware as well as in the KVM Hypervisor.
>
> Based on input from Mike Anderson, Thiago Bauermann, Claudio Carvalho,
> Ben Herrenschmidt, Guerney Hunt, Paul Mackerras.
>
> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
> Signed-off-by: Ram Pai <linuxram@linux.ibm.com>
> Signed-off-by: Guerney Hunt <gdhh@linux.ibm.com>
> Reviewed-by: Claudio Carvalho <cclaudio@linux.ibm.com>
> Reviewed-by: Michael Anderson <andmike@linux.ibm.com>
> Reviewed-by: Thiago Bauermann <bauerman@linux.ibm.com>
> Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
> ---
> Documentation/powerpc/ultravisor.rst | 1055 ++++++++++++++++++++++++++
> 1 file changed, 1055 insertions(+)
> create mode 100644 Documentation/powerpc/ultravisor.rst
>
> diff --git a/Documentation/powerpc/ultravisor.rst b/Documentation/powerpc/ultravisor.rst
> new file mode 100644
> index 000000000000..8d5246585b66
> --- /dev/null
> +++ b/Documentation/powerpc/ultravisor.rst
> @@ -0,0 +1,1055 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +.. _ultravisor:
> +
> +============================
> +Protected Execution Facility
> +============================
> +
> +.. contents::
> + :depth: 3
> +
> +.. sectnum::
> + :depth: 3
> +
> +Protected Execution Facility
> +############################
> +
> + Protected Execution Facility (PEF) is an architectural change for
> + POWER 9 that enables Secure Virtual Machines (SVMs). When enabled,
Ditto here.
Also you don't mention which ISA version PEF is (will be) documented in.
Do we know? Or can we at least reference the RFC number so folks can
find it.
Otherwise this looks really good. I'll try and find time to proof read
it thoroughly.
cheers
> + PEF adds a new higher privileged mode, called Ultravisor mode, to
> + POWER architecture. Along with the new mode there is new firmware
> + called the Protected Execution Ultravisor (or Ultravisor for short).
> + Ultravisor mode is the highest privileged mode in POWER architecture.
> +
> + +------------------+
> + | Privilege States |
> + +==================+
> + | Problem |
> + +------------------+
> + | Supervisor |
> + +------------------+
> + | Hypervisor |
> + +------------------+
> + | Ultravisor |
> + +------------------+
> +
> + PEF protects SVMs from the hypervisor, privileged users, and other
> + VMs in the system. SVMs are protected while at rest and can only be
> + executed by an authorized machine. All virtual machines utilize
> + hypervisor services. The Ultravisor filters calls between the SVMs
> + and the hypervisor to assure that information does not accidentally
> + leak. All hypercalls except H_RANDOM are reflected to the hypervisor.
> + H_RANDOM is not reflected to prevent the hypervisor from influencing
> + random values in the SVM.
> +
> + To support this there is a refactoring of the ownership of resources
> + in the CPU. Some of the resources which were previously hypervisor
> + privileged are now ultravisor privileged.
> +
> +Hardware
> +========
> +
> + The hardware changes include the following:
> +
> + * There is a new bit in the MSR that determines whether the current
> + process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process
> + is in secure mode, MSR(s)=0 process is in normal mode.
> +
> + * The MSR(S) bit can only be set by the Ultravisor.
> +
> + * HRFID cannot be used to set the MSR(S) bit. If the hypervisor needs
> + to return to a SVM it must use an ultracall. It can determine if
> + the VM it is returning to is secure.
> +
> + * There is a new Ultravisor privileged register, SMFCTRL, which has an
> + enable/disable bit SMFCTRL(E).
> +
> + * The privilege of a process is now determined by three MSR bits,
> + MSR(S, HV, PR). In each of the tables below the modes are listed
> + from least privilege to highest privilege. The higher privilege
> + modes can access all the resources of the lower privilege modes.
> +
> + **Secure Mode MSR Settings**
> +
> + +---+---+---+---------------+
> + | S | HV| PR|Privilege |
> + +===+===+===+===============+
> + | 1 | 0 | 1 | Problem |
> + +---+---+---+---------------+
> + | 1 | 0 | 0 | Privileged(OS)|
> + +---+---+---+---------------+
> + | 1 | 1 | 0 | Ultravisor |
> + +---+---+---+---------------+
> + | 1 | 1 | 1 | Reserved |
> + +---+---+---+---------------+
> +
> + **Normal Mode MSR Settings**
> +
> + +---+---+---+---------------+
> + | S | HV| PR|Privilege |
> + +===+===+===+===============+
> + | 0 | 0 | 1 | Problem |
> + +---+---+---+---------------+
> + | 0 | 0 | 0 | Privileged(OS)|
> + +---+---+---+---------------+
> + | 0 | 1 | 0 | Hypervisor |
> + +---+---+---+---------------+
> + | 0 | 1 | 1 | Problem (HV) |
> + +---+---+---+---------------+
> +
> + * Memory is partitioned into secure and normal memory. Only processes
> + that are running in secure mode can access secure memory.
> +
> + * The hardware does not allow anything that is not running secure to
> + access secure memory. This means that the Hypervisor cannot access
> + the memory of the SVM without using an ultracall (asking the
> + Ultravisor). The Ultravisor will only allow the hypervisor to see
> + the SVM memory encrypted.
> +
> + * I/O systems are not allowed to directly address secure memory. This
> + limits the SVMs to virtual I/O only.
> +
> + * The architecture allows the SVM to share pages of memory with the
> + hypervisor that are not protected with encryption. However, this
> + sharing must be initiated by the SVM.
> +
> + * When a process is running in secure mode all hypercalls
> + (syscall lev=1) are reflected to the Ultravisor.
> +
> + * When a process is in secure mode all interrupts go to the
> + Ultravisor.
> +
> + * The following resources have become Ultravisor privileged and
> + require an Ultravisor interface to manipulate:
> +
> + * Processor configurations registers (SCOMs).
> +
> + * Stop state information.
> +
> + * The debug registers CIABR, DAWR, and DAWRX become Ultravisor
> + resources when SMFCTRL(D) is set. If SMFCTRL(D) is not set they do
> + not work in secure mode. When set, reading and writing requires
> + an Ultravisor call, otherwise that will cause a Hypervisor Emulation
> + Assistance interrupt.
> +
> + * PTCR and partition table entries (partition table is in secure
> + memory). An attempt to write to PTCR will cause a Hypervisor
> + Emulation Assitance interrupt.
> +
> + * LDBAR (LD Base Address Register) and IMC (In-Memory Collection)
> + non-architected registers. An attempt to write to them will cause a
> + Hypervisor Emulation Assistance interrupt.
> +
> + * Paging for an SVM, sharing of memory with Hypervisor for an SVM.
> + (Including Virtual Processor Area (VPA) and virtual I/O).
> +
> +
> +Software/Microcode
> +==================
> +
> + The software changes include:
> +
> + * SVMs are created from normal VM using (open source) tooling supplied
> + by IBM.
> +
> + * All SVMs start as normal VMs and utilize an ultracall, UV_ESM
> + (Enter Secure Mode), to make the transition.
> +
> + * When the UV_ESM ultracall is made the Ultravisor copies the VM into
> + secure memory, decrypts the verification information, and checks the
> + integrity of the SVM. If the integrity check passes the Ultravisor
> + passes control in secure mode.
> +
> + * For external interrupts the Ultravisor saves the state of the SVM,
> + and reflects the interrupt to the hypervisor for processing.
> + For hypercalls, the Ultravisor inserts neutral state into all
> + registers not needed for the hypercall then reflects the call to
> + the hypervisor for processing. The H_RANDOM hypercall is performed
> + by the Ultravisor and not reflected.
> +
> + * The verification information includes the pass phrase for the
> + encrypted disk associated with the SVM. This pass phrase is given
> + to the SVM when requested.
> +
> + * The Ultravisor is not involved in protecting the encrypted disk of
> + the SVM while at rest.
> +
> + * For virtual I/O to work bounce buffering must be done.
> +
> + * The Ultravisor uses AES (IAPM) for protection of SVM memory. IAPM
> + is a mode of AES that provides integrity and secrecy concurrently.
> +
> + * The movement of data between normal and secure pages is coordinated
> + with the Ultravisor by a new HMM plug-in in the Hypervisor.
> +
> + The Ultravisor offers new services to the hypervisor and SVMs. These
> + are accessed through ultracalls.
> +
> +Terminology
> +===========
> +
> + * Hypercalls: special system calls used to request services from
> + Hypervisor.
> +
> + * Normal memory: Memory that is accessible to Hypervisor.
> +
> + * Normal page: Page backed by normal memory and available to
> + Hypervisor.
> +
> + * Shared page: A page backed by normal memory and available to both
> + the Hypervisor/QEMU and the SVM (i.e page has mappings in SVM and
> + Hypervisor/QEMU).
> +
> + * Secure memory: Memory that is accessible only to Ultravisor and
> + SVMs.
> +
> + * Secure page: Page backed by secure memory and only available to
> + Ultravisor and SVM.
> +
> + * SVM: Secure Virtual Machine.
> +
> + * Ultracalls: special system calls used to request services from
> + Ultravisor.
> +
> +
> +Ultravisor calls API
> +####################
> +
> + This section describes Ultravisor calls (ultracalls) needed to
> + support Secure Virtual Machines (SVM)s and Paravirtalized KVM. The
> + ultracalls allow the SVMs and Hypervisor to request services from the
> + Ultravisor such as accessing a register or memory region that can only
> + be accessed when running in Ultravisor-privileged mode.
> +
> + The specific service needed from an ultracall is specified in register
> + R3 (the first parameter to the ultracall). Other parameters to the
> + ultracall, if any, are specified in registers R4 through R12.
> +
> + Return value of all ultracalls is in register R3. Other output values
> + from the ultracall, if any, are returned in registers R4 through R12.
> + The only exception to this register usage is the ``UV_RETURN``
> + ultracall described below.
> +
> + Each ultracall returns specific error codes, applicable in the context
> + of the ultracall. However, like with the PowerPC Architecture Platform
> + Reference (PAPR), if no specific error code is defined for a
> + particular situation, then the ultracall will fallback to an erroneous
> + parameter-position based code. i.e U_PARAMETER, U_P2, U_P3 etc
> + depending on the ultracall parameter that may have caused the error.
> +
> + Some ultracalls involve transferring a page of data between Ultravisor
> + and Hypervisor. Secure pages that are transferred from secure memory
> + to normal memory may be encrypted using dynamically generated keys.
> + When the secure pages are transferred back to secure memory, they may
> + be decrypted using the same dynamically generated keys. Generation and
> + management of these keys will be covered in a separate document.
> +
> + For now this only covers ultracalls currently implemented and being
> + used by Hypervisor and SVMs but others can be added here when it
> + makes sense.
> +
> + The full specification for all hypercalls/ultracalls will eventually
> + be made available in the public/OpenPower version of the PAPR
> + specification.
> +
> + **Note**
> +
> + If PEF is not enabled, the ultracalls will be redirected to the
> + Hypervisor which must handle/fail the calls.
> +
> +Ultracalls used by Hypervisor
> +=============================
> +
> + This section describes the virtual memory management ultracalls used
> + by the Hypervisor to manage SVMs.
> +
> +UV_PAGE_OUT
> +-----------
> +
> + Encrypt and move the contents of a page from secure memory to normal
> + memory.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_PAGE_OUT,
> + uint16_t lpid, /* LPAR ID */
> + uint64_t dest_ra, /* real address of destination page */
> + uint64_t src_gpa, /* source guest-physical-address */
> + uint8_t flags, /* flags */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``dest_ra`` is invalid.
> + * U_P3 if the ``src_gpa`` address is invalid.
> + * U_P4 if any bit in the ``flags`` is unrecognized
> + * U_P5 if the ``order`` parameter is unsupported.
> + * U_FUNCTION if functionality is not supported.
> + * U_BUSY if page cannot be currently paged-out.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Encrypt the contents of a secure-page and make it available to
> + Hypervisor in a normal page.
> +
> + By default, the source page is unmapped from the SVM's partition-
> + scoped page table. But the Hypervisor can provide a hint to the
> + Ultravisor to retain the page mapping by setting the ``UV_SNAPSHOT``
> + flag in ``flags`` parameter.
> +
> + If the source page is already a shared page the call returns
> + U_SUCCESS, without doing anything.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. QEMU attempts to access an address belonging to the SVM but the
> + page frame for that address is not mapped into QEMU's address
> + space. In this case, the Hypervisor will allocate a page frame,
> + map it into QEMU's address space and issue the ``UV_PAGE_OUT``
> + call to retrieve the encrypted contents of the page.
> +
> + #. When Ultravisor runs low on secure memory and it needs to page-out
> + an LRU page. In this case, Ultravisor will issue the
> + ``H_SVM_PAGE_OUT`` hypercall to the Hypervisor. The Hypervisor will
> + then allocate a normal page and issue the ``UV_PAGE_OUT`` ultracall
> + and the Ultravisor will encrypt and move the contents of the secure
> + page into the normal page.
> +
> +
> +UV_PAGE_IN
> +----------
> +
> + Move the contents of a page from normal memory to secure memory.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_PAGE_IN,
> + uint16_t lpid, /* the LPAR ID */
> + uint64_t src_ra, /* source real address of page */
> + uint64_t dest_gpa, /* destination guest physical address */
> + uint64_t flags, /* flags */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_BUSY if page cannot be currently paged-in.
> + * U_FUNCTION if functionality is not supported
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``src_ra`` is invalid.
> + * U_P3 if the ``dest_gpa`` address is invalid.
> + * U_P4 if any bit in the ``flags`` is unrecognized
> + * U_P5 if the ``order`` parameter is unsupported.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Move the contents of the page identified by ``src_ra`` from normal
> + memory to secure memory and map it to the guest physical address
> + ``dest_gpa``.
> +
> + If `dest_gpa` refers to a shared address, map the page into the
> + partition-scoped page-table of the SVM. If `dest_gpa` is not shared,
> + copy the contents of the page into the corresponding secure page.
> + Depending on the context, decrypt the page before being copied.
> +
> + The caller provides the attributes of the page through the ``flags``
> + parameter. Valid values for ``flags`` are:
> +
> + * CACHE_INHIBITED
> + * CACHE_ENABLED
> + * WRITE_PROTECTION
> +
> + The Hypervisor must pin the page in memory before making
> + ``UV_PAGE_IN`` ultracall.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. When a normal VM switches to secure mode, all its pages residing
> + in normal memory, are moved into secure memory.
> +
> + #. When an SVM requests to share a page with Hypervisor the Hypervisor
> + allocates a page and informs the Ultravisor.
> +
> + #. When an SVM accesses a secure page that has been paged-out,
> + Ultravisor invokes the Hypervisor to locate the page. After
> + locating the page, the Hypervisor uses UV_PAGE_IN to make the
> + page available to Ultravisor.
> +
> + #. When Hypervisor accesses SVM data, the Hypervisor requests the
> + Ultravisor to transfer the corresponding page into a insecure page,
> + which the Hypervisor can access. The data in the normal page will
> + be encrypted though.
> +
> +UV_PAGE_INVAL
> +-------------
> +
> + Invalidate the Ultravisor mapping of a page.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_PAGE_INVAL,
> + uint16_t lpid, /* the LPAR ID */
> + uint64_t guest_pa, /* destination guest-physical-address */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``guest_pa`` is invalid (or corresponds to a secure
> + page mapping).
> + * U_P3 if the ``order`` is invalid.
> + * U_FUNCTION if functionality is not supported.
> + * U_BUSY if page cannot be currently invalidated.
> +
> +Description
> +~~~~~~~~~~~
> +
> + This ultracall informs Ultravisor that the page mapping in Hypervisor
> + corresponding to the given guest physical address has been invalidated
> + and that the Ultravisor should not access the page. If the specified
> + ``guest_pa`` corresponds to a secure page, Ultravisor will ignore the
> + attempt to invalidate the page and return U_P2.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. When a shared page is unmapped from the QEMU's page table, possibly
> + because it is paged-out to disk, Ultravisor needs to know that the
> + page should not be accessed from its side too.
> +
> +
> +UV_WRITE_PATE
> +-------------
> +
> + Validate and write the partition table entry (PATE) for a given
> + partition.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_WRITE_PATE,
> + uint32_t lpid, /* the LPAR ID */
> + uint64_t dw0 /* the first double word to write */
> + uint64_t dw1) /* the second double word to write */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_BUSY if PATE cannot be currently written to.
> + * U_FUNCTION if functionality is not supported.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``dw0`` is invalid.
> + * U_P3 if the ``dw1`` address is invalid.
> + * U_PERMISSION if the Hypervisor is attempting to change the PATE
> + of a secure virtual machine or if called from a
> + context other than Hypervisor.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Validate and write a LPID and its partition-table-entry for the given
> + LPID. If the LPID is already allocated and initialized, this call
> + results in changing the partition table entry.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. The Partition table resides in Secure memory and its entries,
> + called PATE (Partition Table Entries), point to the partition-
> + scoped page tables for the Hypervisor as well as each of the
> + virtual machines (both secure and normal). The Hypervisor
> + operates in partition 0 and its partition-scoped page tables
> + reside in normal memory.
> +
> + #. This ultracall allows the Hypervisor to register the partition-
> + scoped and process-scoped page table entries for the Hypervisor
> + and other partitions (virtual machines) with the Ultravisor.
> +
> + #. If the value of the PATE for an existing partition (VM) changes,
> + the TLB cache for the partition is flushed.
> +
> + #. The Hypervisor is responsible for allocating LPID. The LPID and
> + its PATE entry are registered together. The Hypervisor manages
> + the PATE entries for a normal VM and can change the PATE entry
> + anytime. Ultravisor manages the PATE entries for an SVM and
> + Hypervisor is not allowed to modify them.
> +
> +UV_RETURN
> +---------
> +
> + Return control from the Hypervisor back to the Ultravisor after
> + processing an hypercall or interrupt that was forwarded (aka
> + *reflected*) to the Hypervisor.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_RETURN)
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + This call never returns to Hypervisor on success. It returns
> + U_INVALID if ultracall is not made from a Hypervisor context.
> +
> +Description
> +~~~~~~~~~~~
> +
> + When an SVM makes an hypercall or incurs some other exception, the
> + Ultravisor usually forwards (aka *reflects*) the exceptions to the
> + Hypervisor. After processing the exception, Hypervisor uses the
> + ``UV_RETURN`` ultracall to return control back to the SVM.
> +
> + The expected register state on entry to this ultracall is:
> +
> + * Non-volatile registers are restored to their original values.
> + * If returning from an hypercall, register R0 contains the return
> + value (**unlike other ultracalls**) and, registers R4 through R12
> + contain any output values of the hypercall.
> + * R3 contains the ultracall number, i.e UV_RETURN.
> + * If returning with a synthesized interrupt, R2 contains the
> + synthesized interrupt number.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. Ultravisor relies on the Hypervisor to provide several services to
> + the SVM such as processing hypercall and other exceptions. After
> + processing the exception, Hypervisor uses UV_RETURN to return
> + control back to the Ultravisor.
> +
> + #. Hypervisor has to use this ultracall to return control to the SVM.
> +
> +
> +UV_REGISTER_MEM_SLOT
> +--------------------
> +
> + Register an SVM address-range with specified properties.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_REGISTER_MEM_SLOT,
> + uint64_t lpid, /* LPAR ID of the SVM */
> + uint64_t start_gpa, /* start guest physical address */
> + uint64_t size, /* size of address range in bytes */
> + uint64_t flags /* reserved for future expansion */
> + uint16_t slotid) /* slot identifier */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``start_gpa`` is invalid.
> + * U_P3 if ``size`` is invalid.
> + * U_P4 if any bit in the ``flags`` is unrecognized.
> + * U_P5 if the ``slotid`` parameter is unsupported.
> + * U_PERMISSION if called from context other than Hypervisor.
> + * U_FUNCTION if functionality is not supported.
> +
> +
> +Description
> +~~~~~~~~~~~
> +
> + Register a memory range for an SVM. The memory range starts at the
> + guest physical address ``start_gpa`` and is ``size`` bytes long.
> +
> +Use cases
> +~~~~~~~~~
> +
> +
> + #. When a virtual machine goes secure, all the memory slots managed by
> + the Hypervisor move into secure memory. The Hypervisor iterates
> + through each of memory slots, and registers the slot with
> + Ultravisor. Hypervisor may discard some slots such as those used
> + for firmware (SLOF).
> +
> + #. When new memory is hot-plugged, a new memory slot gets registered.
> +
> +
> +UV_UNREGISTER_MEM_SLOT
> +----------------------
> +
> + Unregister an SVM address-range that was previously registered using
> + UV_REGISTER_MEM_SLOT.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_UNREGISTER_MEM_SLOT,
> + uint64_t lpid, /* LPAR ID of the SVM */
> + uint64_t slotid) /* reservation slotid */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_FUNCTION if functionality is not supported.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``slotid`` is invalid.
> + * U_PERMISSION if called from context other than Hypervisor.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Release the memory slot identified by ``slotid`` and free any
> + resources allocated towards the reservation.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. Memory hot-remove.
> +
> +
> +UV_SVM_TERMINATE
> +----------------
> +
> + Terminate an SVM and release its resources.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_SVM_TERMINATE,
> + uint64_t lpid, /* LPAR ID of the SVM */)
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_FUNCTION if functionality is not supported.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_INVALID if VM is not secure.
> + * U_PERMISSION if not called from a Hypervisor context.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Terminate an SVM and release all its resources.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. Called by Hypervisor when terminating an SVM.
> +
> +
> +Ultracalls used by SVM
> +======================
> +
> +UV_SHARE_PAGE
> +-------------
> +
> + Share a set of guest physical pages with the Hypervisor.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_SHARE_PAGE,
> + uint64_t gfn, /* guest page frame number */
> + uint64_t num) /* number of pages of size PAGE_SIZE */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_FUNCTION if functionality is not supported.
> + * U_INVALID if the VM is not secure.
> + * U_PARAMETER if ``gfn`` is invalid.
> + * U_P2 if ``num`` is invalid.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Share the ``num`` pages starting at guest physical frame number ``gfn``
> + with the Hypervisor. Assume page size is PAGE_SIZE bytes. Zero the
> + pages before returning.
> +
> + If the address is already backed by a secure page, unmap the page and
> + back it with an insecure page, with the help of the Hypervisor. If it
> + is not backed by any page yet, mark the PTE as insecure and back it
> + with an insecure page when the address is accessed. If it is already
> + backed by an insecure page, zero the page and return.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. The Hypervisor cannot access the SVM pages since they are backed by
> + secure pages. Hence an SVM must explicitly request Ultravisor for
> + pages it can share with Hypervisor.
> +
> + #. Shared pages are needed to support virtio and Virtual Processor Area
> + (VPA) in SVMs.
> +
> +
> +UV_UNSHARE_PAGE
> +---------------
> +
> + Restore a shared SVM page to its initial state.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_UNSHARE_PAGE,
> + uint64_t gfn, /* guest page frame number */
> + uint73 num) /* number of pages of size PAGE_SIZE*/
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_FUNCTION if functionality is not supported.
> + * U_INVALID if VM is not secure.
> + * U_PARAMETER if ``gfn`` is invalid.
> + * U_P2 if ``num`` is invalid.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Stop sharing ``num`` pages starting at ``gfn`` with the Hypervisor.
> + Assume that the page size is PAGE_SIZE. Zero the pages before
> + returning.
> +
> + If the address is already backed by an insecure page, unmap the page
> + and back it with a secure page. Inform the Hypervisor to release
> + reference to its shared page. If the address is not backed by a page
> + yet, mark the PTE as secure and back it with a secure page when that
> + address is accessed. If it is already backed by an secure page zero
> + the page and return.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. The SVM may decide to unshare a page from the Hypervisor.
> +
> +
> +UV_UNSHARE_ALL_PAGES
> +--------------------
> +
> + Unshare all pages the SVM has shared with Hypervisor.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_UNSHARE_ALL_PAGES)
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_FUNCTION if functionality is not supported.
> + * U_INVAL if VM is not secure.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Unshare all shared pages from the Hypervisor. All unshared pages are
> + zeroed on return. Only pages explicitly shared by the SVM with the
> + Hypervisor (using UV_SHARE_PAGE ultracall) are unshared. Ultravisor
> + may internally share some pages with the Hypervisor without explicit
> + request from the SVM. These pages will not be unshared by this
> + ultracall.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. This call is needed when ``kexec`` is used to boot a different
> + kernel. It may also be needed during SVM reset.
> +
> +UV_ESM
> +------
> +
> + Secure the virtual machine (*enter secure mode*).
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_ESM,
> + uint64_t esm_blob_addr, /* location of the ESM blob */
> + unint64_t fdt) /* Flattened device tree */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success (including if VM is already secure).
> + * U_FUNCTION if functionality is not supported.
> + * U_INVALID if VM is not secure.
> + * U_PARAMETER if ``esm_blob_addr`` is invalid.
> + * U_P2 if ``fdt`` is invalid.
> + * U_PERMISSION if any integrity checks fail.
> + * U_RETRY insufficient memory to create SVM.
> + * U_NO_KEY symmetric key unavailable.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Secure the virtual machine. On successful completion, return
> + control to the virtual machine at the address specified in the
> + ESM blob.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. A normal virtual machine can choose to switch to a secure mode.
> +
> +Hypervisor Calls API
> +####################
> +
> + This document describes the Hypervisor calls (hypercalls) that are
> + needed to support the Ultravisor. Hypercalls are services provided by
> + the Hypervisor to virtual machines and Ultravisor.
> +
> + Register usage for these hypercalls is identical to that of the other
> + hypercalls defined in the Power Architecture Platform Reference (PAPR)
> + document. i.e on input, register R3 identifies the specific service
> + that is being requested and registers R4 through R11 contain
> + additional parameters to the hypercall, if any. On output, register
> + R3 contains the return value and registers R4 through R9 contain any
> + other output values from the hypercall.
> +
> + This document only covers hypercalls currently implemented/planned
> + for Ultravisor usage but others can be added here when it makes sense.
> +
> + The full specification for all hypercalls/ultracalls will eventually
> + be made available in the public/OpenPower version of the PAPR
> + specification.
> +
> +Hypervisor calls to support Ultravisor
> +======================================
> +
> + Following are the set of hypercalls needed to support Ultravisor.
> +
> +H_SVM_INIT_START
> +----------------
> +
> + Begin the process of converting a normal virtual machine into an SVM.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t hypercall(const uint64_t H_SVM_INIT_START)
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * H_SUCCESS on success.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Initiate the process of securing a virtual machine. This involves
> + coordinating with the Ultravisor, using ultracalls, to allocate
> + resources in the Ultravisor for the new SVM, transferring the VM's
> + pages from normal to secure memory etc. When the process is
> + completed, Ultravisor issues the H_SVM_INIT_DONE hypercall.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. Ultravisor uses this hypercall to inform Hypervisor that a VM
> + has initiated the process of switching to secure mode.
> +
> +
> +H_SVM_INIT_DONE
> +---------------
> +
> + Complete the process of securing an SVM.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t hypercall(const uint64_t H_SVM_INIT_DONE)
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * H_SUCCESS on success.
> + * H_UNSUPPORTED if called from the wrong context (e.g.
> + from an SVM or before an H_SVM_INIT_START
> + hypercall).
> +
> +Description
> +~~~~~~~~~~~
> +
> + Complete the process of securing a virtual machine. This call must
> + be made after a prior call to ``H_SVM_INIT_START`` hypercall.
> +
> +Use cases
> +~~~~~~~~~
> +
> + On successfully securing a virtual machine, the Ultravisor informs
> + Hypervisor about it. Hypervisor can use this call to finish setting
> + up its internal state for this virtual machine.
> +
> +
> +H_SVM_PAGE_IN
> +-------------
> +
> + Move the contents of a page from normal memory to secure memory.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t hypercall(const uint64_t H_SVM_PAGE_IN,
> + uint64_t guest_pa, /* guest-physical-address */
> + uint64_t flags, /* flags */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * H_SUCCESS on success.
> + * H_PARAMETER if ``guest_pa`` is invalid.
> + * H_P2 if ``flags`` is invalid.
> + * H_P3 if ``order`` of page is invalid.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Retrieve the content of the page, belonging to the VM at the specified
> + guest physical address.
> +
> + Only valid value(s) in ``flags`` are:
> +
> + * H_PAGE_IN_SHARED which indicates that the page is to be shared
> + with the Ultravisor.
> +
> + * H_PAGE_IN_NONSHARED indicates that the UV is not anymore
> + interested in the page. Applicable if the page is a shared page.
> +
> + The ``order`` parameter must correspond to the configured page size.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. When a normal VM becomes a secure VM (using the UV_ESM ultracall),
> + the Ultravisor uses this hypercall to move contents of each page of
> + the VM from normal memory to secure memory.
> +
> + #. Ultravisor uses this hypercall to ask Hypervisor to provide a page
> + in normal memory that can be shared between the SVM and Hypervisor.
> +
> + #. Ultravisor uses this hypercall to page-in a paged-out page. This
> + can happen when the SVM touches a paged-out page.
> +
> + #. If SVM wants to disable sharing of pages with Hypervisor, it can
> + inform Ultravisor to do so. Ultravisor will then use this hypercall
> + and inform Hypervisor that it has released access to the normal
> + page.
> +
> +H_SVM_PAGE_OUT
> +---------------
> +
> + Move the contents of the page to normal memory.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t hypercall(const uint64_t H_SVM_PAGE_OUT,
> + uint64_t guest_pa, /* guest-physical-address */
> + uint64_t flags, /* flags (currently none) */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * H_SUCCESS on success.
> + * H_PARAMETER if ``guest_pa`` is invalid.
> + * H_P2 if ``flags`` is invalid.
> + * H_P3 if ``order`` is invalid.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Move the contents of the page identified by ``guest_pa`` to normal
> + memory.
> +
> + Currently ``flags`` is unused and must be set to 0. The ``order``
> + parameter must correspond to the configured page size.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. If Ultravisor is running low on secure pages, it can move the
> + contents of some secure pages, into normal pages using this
> + hypercall. The content will be encrypted.
> +
> +References
> +##########
> +
> +.. [1] `Supporting Protected Computing on IBM Power Architecture <https://developer.ibm.com/articles/l-support-protected-computing/>`_
> --
> 2.20.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API
2019-08-08 4:05 ` [PATCH v5 1/7] Documentation/powerpc: Ultravisor API Claudio Carvalho
2019-08-09 12:45 ` Michael Ellerman
@ 2019-08-12 15:58 ` Fabiano Rosas
2019-08-21 22:01 ` Claudio Carvalho
1 sibling, 1 reply; 20+ messages in thread
From: Fabiano Rosas @ 2019-08-12 15:58 UTC (permalink / raw)
To: Claudio Carvalho, linuxppc-dev
Cc: Madhavan Srinivasan, Sukadev Bhattiprolu, Michael Anderson,
Ram Pai, Claudio Carvalho, kvm-ppc, Bharata B Rao, Ryan Grimm,
Ram Pai, Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
Claudio Carvalho <cclaudio@linux.ibm.com> writes:
Some small suggestions below:
> +
> + * The privilege of a process is now determined by three MSR bits,
> + MSR(S, HV, PR). In each of the tables below the modes are listed
> + from least privilege to highest privilege. The higher privilege
> + modes can access all the resources of the lower privilege modes.
> +
> + **Secure Mode MSR Settings**
> +
> + +---+---+---+---------------+
> + | S | HV| PR|Privilege |
> + +===+===+===+===============+
> + | 1 | 0 | 1 | Problem |
> + +---+---+---+---------------+
> + | 1 | 0 | 0 | Privileged(OS)|
> + +---+---+---+---------------+
> + | 1 | 1 | 0 | Ultravisor |
> + +---+---+---+---------------+
> + | 1 | 1 | 1 | Reserved |
> + +---+---+---+---------------+
> +
> + **Normal Mode MSR Settings**
> +
> + +---+---+---+---------------+
> + | S | HV| PR|Privilege |
> + +===+===+===+===============+
> + | 0 | 0 | 1 | Problem |
> + +---+---+---+---------------+
> + | 0 | 0 | 0 | Privileged(OS)|
> + +---+---+---+---------------+
> + | 0 | 1 | 0 | Hypervisor |
> + +---+---+---+---------------+
> + | 0 | 1 | 1 | Problem (HV) |
> + +---+---+---+---------------+
I find the use of '(HV)' in this last line a bit ambiguous. Since we are
already using 'HV' to refer to MSR(HV). I'd suggest using '(Host)' or
simply leaving it out.
> +
> + * Memory is partitioned into secure and normal memory. Only processes
> + that are running in secure mode can access secure memory.
> +
> + * The hardware does not allow anything that is not running secure to
> + access secure memory. This means that the Hypervisor cannot access
> + the memory of the SVM without using an ultracall (asking the
> + Ultravisor). The Ultravisor will only allow the hypervisor to see
> + the SVM memory encrypted.
> +
> + * I/O systems are not allowed to directly address secure memory. This
> + limits the SVMs to virtual I/O only.
> +
> + * The architecture allows the SVM to share pages of memory with the
> + hypervisor that are not protected with encryption. However, this
> + sharing must be initiated by the SVM.
> +
> + * When a process is running in secure mode all hypercalls
> + (syscall lev=1) are reflected to the Ultravisor.
Here 'reflected' refers to the Ultravisor. Later on, it is used as
meaning the Ultravisor reflects hypercalls/interrupts to the
Hypervisor. I suggest we use this term to mean the latter only.
> +
> + * When a process is in secure mode all interrupts go to the
> + Ultravisor.
> +
> + * The following resources have become Ultravisor privileged and
> + require an Ultravisor interface to manipulate:
> +
> + * Processor configurations registers (SCOMs).
> +
> + * Stop state information.
> +
> + * The debug registers CIABR, DAWR, and DAWRX become Ultravisor
> + resources when SMFCTRL(D) is set. If SMFCTRL(D) is not set they do
It looks like you could go without "become Ultravisor resources" since
it is already mentioned in the parent item above (The following...).
> + not work in secure mode. When set, reading and writing requires
> + an Ultravisor call, otherwise that will cause a Hypervisor Emulation
> + Assistance interrupt.
> +
> + * PTCR and partition table entries (partition table is in secure
> + memory). An attempt to write to PTCR will cause a Hypervisor
> + Emulation Assitance interrupt.
> +
> + * LDBAR (LD Base Address Register) and IMC (In-Memory Collection)
> + non-architected registers. An attempt to write to them will cause a
> + Hypervisor Emulation Assistance interrupt.
> +
> + * Paging for an SVM, sharing of memory with Hypervisor for an SVM.
> + (Including Virtual Processor Area (VPA) and virtual I/O).
> +
> +
> +Software/Microcode
> +==================
> +
> + The software changes include:
> +
> + * SVMs are created from normal VM using (open source) tooling supplied
> + by IBM.
> +
> + * All SVMs start as normal VMs and utilize an ultracall, UV_ESM
> + (Enter Secure Mode), to make the transition.
> +
> + * When the UV_ESM ultracall is made the Ultravisor copies the VM into
> + secure memory, decrypts the verification information, and checks the
> + integrity of the SVM. If the integrity check passes the Ultravisor
> + passes control in secure mode.
> +
> + * For external interrupts the Ultravisor saves the state of the SVM,
> + and reflects the interrupt to the hypervisor for processing.
> + For hypercalls, the Ultravisor inserts neutral state into all
> + registers not needed for the hypercall then reflects the call to
> + the hypervisor for processing. The H_RANDOM hypercall is performed
> + by the Ultravisor and not reflected.
> +
> + * The verification information includes the pass phrase for the
> + encrypted disk associated with the SVM. This pass phrase is given
> + to the SVM when requested.
This is the second mention of 'verification information'. Could we
perhaps move this up after "SMVs are created..." and rephrase it in a way
that introduces the concept? What/where/in what state is the
verification information?
> +
> + * The Ultravisor is not involved in protecting the encrypted disk of
> + the SVM while at rest.
> +
> + * For virtual I/O to work bounce buffering must be done.
> +
> + * The Ultravisor uses AES (IAPM) for protection of SVM memory. IAPM
> + is a mode of AES that provides integrity and secrecy concurrently.
> +
> + * The movement of data between normal and secure pages is coordinated
> + with the Ultravisor by a new HMM plug-in in the Hypervisor.
> +
> + The Ultravisor offers new services to the hypervisor and SVMs. These
> + are accessed through ultracalls.
> +
> +Terminology
> +===========
> +
> + * Hypercalls: special system calls used to request services from
> + Hypervisor.
> +
> + * Normal memory: Memory that is accessible to Hypervisor.
> +
> + * Normal page: Page backed by normal memory and available to
> + Hypervisor.
> +
> + * Shared page: A page backed by normal memory and available to both
> + the Hypervisor/QEMU and the SVM (i.e page has mappings in SVM and
> + Hypervisor/QEMU).
> +
> + * Secure memory: Memory that is accessible only to Ultravisor and
> + SVMs.
> +
> + * Secure page: Page backed by secure memory and only available to
> + Ultravisor and SVM.
> +
> + * SVM: Secure Virtual Machine.
> +
> + * Ultracalls: special system calls used to request services from
> + Ultravisor.
> +
> +
> +Ultravisor calls API
> +####################
> +
> + This section describes Ultravisor calls (ultracalls) needed to
> + support Secure Virtual Machines (SVM)s and Paravirtalized KVM. The
Paravirtualized
> + ultracalls allow the SVMs and Hypervisor to request services from the
> + Ultravisor such as accessing a register or memory region that can only
> + be accessed when running in Ultravisor-privileged mode.
> +
> + The specific service needed from an ultracall is specified in register
> + R3 (the first parameter to the ultracall). Other parameters to the
> + ultracall, if any, are specified in registers R4 through R12.
> +
> + Return value of all ultracalls is in register R3. Other output values
> + from the ultracall, if any, are returned in registers R4 through R12.
> + The only exception to this register usage is the ``UV_RETURN``
> + ultracall described below.
> +
> + Each ultracall returns specific error codes, applicable in the context
> + of the ultracall. However, like with the PowerPC Architecture Platform
> + Reference (PAPR), if no specific error code is defined for a
> + particular situation, then the ultracall will fallback to an erroneous
> + parameter-position based code. i.e U_PARAMETER, U_P2, U_P3 etc
> + depending on the ultracall parameter that may have caused the error.
> +
> + Some ultracalls involve transferring a page of data between Ultravisor
> + and Hypervisor. Secure pages that are transferred from secure memory
> + to normal memory may be encrypted using dynamically generated keys.
> + When the secure pages are transferred back to secure memory, they may
> + be decrypted using the same dynamically generated keys. Generation and
> + management of these keys will be covered in a separate document.
> +
> + For now this only covers ultracalls currently implemented and being
> + used by Hypervisor and SVMs but others can be added here when it
> + makes sense.
> +
> + The full specification for all hypercalls/ultracalls will eventually
> + be made available in the public/OpenPower version of the PAPR
> + specification.
> +
> + **Note**
> +
> + If PEF is not enabled, the ultracalls will be redirected to the
> + Hypervisor which must handle/fail the calls.
> +
> +Ultracalls used by Hypervisor
> +=============================
> +
> + This section describes the virtual memory management ultracalls used
> + by the Hypervisor to manage SVMs.
> +
> +UV_PAGE_OUT
> +-----------
> +
> + Encrypt and move the contents of a page from secure memory to normal
> + memory.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_PAGE_OUT,
> + uint16_t lpid, /* LPAR ID */
> + uint64_t dest_ra, /* real address of destination page */
> + uint64_t src_gpa, /* source guest-physical-address */
> + uint8_t flags, /* flags */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``dest_ra`` is invalid.
> + * U_P3 if the ``src_gpa`` address is invalid.
> + * U_P4 if any bit in the ``flags`` is unrecognized
> + * U_P5 if the ``order`` parameter is unsupported.
> + * U_FUNCTION if functionality is not supported.
> + * U_BUSY if page cannot be currently paged-out.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Encrypt the contents of a secure-page and make it available to
> + Hypervisor in a normal page.
> +
> + By default, the source page is unmapped from the SVM's partition-
> + scoped page table. But the Hypervisor can provide a hint to the
> + Ultravisor to retain the page mapping by setting the ``UV_SNAPSHOT``
> + flag in ``flags`` parameter.
> +
> + If the source page is already a shared page the call returns
> + U_SUCCESS, without doing anything.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. QEMU attempts to access an address belonging to the SVM but the
> + page frame for that address is not mapped into QEMU's address
> + space. In this case, the Hypervisor will allocate a page frame,
> + map it into QEMU's address space and issue the ``UV_PAGE_OUT``
> + call to retrieve the encrypted contents of the page.
> +
> + #. When Ultravisor runs low on secure memory and it needs to page-out
> + an LRU page. In this case, Ultravisor will issue the
> + ``H_SVM_PAGE_OUT`` hypercall to the Hypervisor. The Hypervisor will
> + then allocate a normal page and issue the ``UV_PAGE_OUT`` ultracall
> + and the Ultravisor will encrypt and move the contents of the secure
> + page into the normal page.
> +
> +
> +UV_PAGE_IN
> +----------
> +
> + Move the contents of a page from normal memory to secure memory.
> +
> +Syntax
> +~~~~~~
> +
> +.. code-block:: c
> +
> + uint64_t ultracall(const uint64_t UV_PAGE_IN,
> + uint16_t lpid, /* the LPAR ID */
> + uint64_t src_ra, /* source real address of page */
> + uint64_t dest_gpa, /* destination guest physical address */
> + uint64_t flags, /* flags */
> + uint64_t order) /* page size order */
> +
> +Return values
> +~~~~~~~~~~~~~
> +
> + One of the following values:
> +
> + * U_SUCCESS on success.
> + * U_BUSY if page cannot be currently paged-in.
> + * U_FUNCTION if functionality is not supported
> + * U_PARAMETER if ``lpid`` is invalid.
> + * U_P2 if ``src_ra`` is invalid.
> + * U_P3 if the ``dest_gpa`` address is invalid.
> + * U_P4 if any bit in the ``flags`` is unrecognized
> + * U_P5 if the ``order`` parameter is unsupported.
> +
> +Description
> +~~~~~~~~~~~
> +
> + Move the contents of the page identified by ``src_ra`` from normal
> + memory to secure memory and map it to the guest physical address
> + ``dest_gpa``.
> +
> + If `dest_gpa` refers to a shared address, map the page into the
> + partition-scoped page-table of the SVM. If `dest_gpa` is not shared,
> + copy the contents of the page into the corresponding secure page.
> + Depending on the context, decrypt the page before being copied.
> +
> + The caller provides the attributes of the page through the ``flags``
> + parameter. Valid values for ``flags`` are:
> +
> + * CACHE_INHIBITED
> + * CACHE_ENABLED
> + * WRITE_PROTECTION
> +
> + The Hypervisor must pin the page in memory before making
> + ``UV_PAGE_IN`` ultracall.
> +
> +Use cases
> +~~~~~~~~~
> +
> + #. When a normal VM switches to secure mode, all its pages residing
> + in normal memory, are moved into secure memory.
> +
> + #. When an SVM requests to share a page with Hypervisor the Hypervisor
> + allocates a page and informs the Ultravisor.
> +
> + #. When an SVM accesses a secure page that has been paged-out,
> + Ultravisor invokes the Hypervisor to locate the page. After
> + locating the page, the Hypervisor uses UV_PAGE_IN to make the
> + page available to Ultravisor.
> +
> + #. When Hypervisor accesses SVM data, the Hypervisor requests the
> + Ultravisor to transfer the corresponding page into a insecure page,
> + which the Hypervisor can access. The data in the normal page will
> + be encrypted though.
This looks like it should be under UV_PAGE_OUT instead.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler
2019-08-08 4:05 ` [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler Claudio Carvalho
@ 2019-08-14 10:46 ` Michael Ellerman
2019-08-14 18:34 ` Segher Boessenkool
2019-08-22 1:24 ` Claudio Carvalho
0 siblings, 2 replies; 20+ messages in thread
From: Michael Ellerman @ 2019-08-14 10:46 UTC (permalink / raw)
To: Claudio Carvalho, linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
Claudio Carvalho <cclaudio@linux.ibm.com> writes:
> diff --git a/arch/powerpc/kernel/ucall.S b/arch/powerpc/kernel/ucall.S
> new file mode 100644
> index 000000000000..de9133e45d21
> --- /dev/null
> +++ b/arch/powerpc/kernel/ucall.S
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Generic code to perform an ultravisor call.
> + *
> + * Copyright 2019, IBM Corporation.
> + *
> + */
> +#include <asm/ppc_asm.h>
> +#include <asm/export.h>
> +
> +_GLOBAL(ucall_norets)
> +EXPORT_SYMBOL_GPL(ucall_norets)
> + mfcr r0
> + stw r0,8(r1)
> +
> + sc 2 /* Invoke the ultravisor */
> +
> + lwz r0,8(r1)
> + mtcrf 0xff,r0
> + blr /* Return r3 = status */
Paulus points that we shouldn't need to save CR here. Our caller will
have already saved it if it needed to, and we don't use CR in this
function so we don't need to save it.
That's assuming the Ultravisor follows the hcall ABI in which CR2-4 are
non-volatile (PAPR § 14.5.3).
I know plpar_hcall_norets() does save CR, but it shouldn't need to, that
seems to be historical. aka. no one knows why it does it but it always
has.
cheers
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE
2019-08-08 4:05 ` [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE Claudio Carvalho
@ 2019-08-14 11:33 ` Michael Ellerman
2019-08-21 0:04 ` Sukadev Bhattiprolu
2019-08-22 1:33 ` Claudio Carvalho
0 siblings, 2 replies; 20+ messages in thread
From: Michael Ellerman @ 2019-08-14 11:33 UTC (permalink / raw)
To: Claudio Carvalho, linuxppc-dev
Cc: Ryan Grimm, Madhavan Srinivasan, Michael Anderson, Ram Pai,
Claudio Carvalho, kvm-ppc, Bharata B Rao, Ryan Grimm,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
Hi Claudio,
Claudio Carvalho <cclaudio@linux.ibm.com> writes:
> From: Michael Anderson <andmike@linux.ibm.com>
>
> In ultravisor enabled systems, the ultravisor creates and maintains the
> partition table in secure memory where the hypervisor cannot access, and
^
which?
> therefore, the hypervisor have to do the UV_WRITE_PATE ucall whenever it
^ ^
has a
> wants to set a partition table entry (PATE).
>
> This patch adds the UV_WRITE_PATE ucall and uses it to set a PATE if
> ultravisor is enabled. Additionally, this also also keeps a copy of the
> partition table because the nestMMU does not have access to secure
> memory. Such copy has entries for nonsecure and hypervisor partition.
I'm having trouble parsing the last sentence there.
Or at least it doesn't seem to match the code, or I don't understand
either the code or the comment. More below.
> diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c
> index 85bc81abd286..033731f5dbaa 100644
> --- a/arch/powerpc/mm/book3s64/pgtable.c
> +++ b/arch/powerpc/mm/book3s64/pgtable.c
> @@ -213,34 +223,50 @@ void __init mmu_partition_table_init(void)
> powernv_set_nmmu_ptcr(ptcr);
> }
>
> -void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
> - unsigned long dw1)
> +/*
> + * Global flush of TLBs and partition table caches for this lpid. The type of
> + * flush (hash or radix) depends on what the previous use of this partition ID
> + * was, not the new use.
> + */
> +static void flush_partition(unsigned int lpid, unsigned long old_patb0)
A nicer API would be for the 2nd param to be a "bool radix", and have
the caller worry about the fact that it comes from (patb0 & PATB_HR).
> {
> - unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
> -
> - partition_tb[lpid].patb0 = cpu_to_be64(dw0);
> - partition_tb[lpid].patb1 = cpu_to_be64(dw1);
> -
> - /*
> - * Global flush of TLBs and partition table caches for this lpid.
> - * The type of flush (hash or radix) depends on what the previous
> - * use of this partition ID was, not the new use.
> - */
> asm volatile("ptesync" : : : "memory");
> - if (old & PATB_HR) {
> - asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
> + if (old_patb0 & PATB_HR) {
> + asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 1) : :
> "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
> - asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
> + asm volatile(PPC_TLBIE_5(%0, %1, 2, 1, 1) : :
That looks like an unrelated whitespace change.
> "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
> trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
> } else {
> - asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
> + asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 0) : :
Ditto.
> "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
> trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
> }
> /* do we need fixup here ?*/
> asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> }
> +
> +void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
> + unsigned long dw1)
> +{
> + unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
> +
> + partition_tb[lpid].patb0 = cpu_to_be64(dw0);
> + partition_tb[lpid].patb1 = cpu_to_be64(dw1);
ie. here we always update the copy of the partition table, regardless of
whether we're running under an ultravisor or not. So the copy is a
complete copy isn't it?
> + /*
> + * In ultravisor enabled systems, the ultravisor maintains the partition
> + * table in secure memory where we don't have access, therefore, we have
> + * to do a ucall to set an entry.
> + */
> + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) {
> + uv_register_pate(lpid, dw0, dw1);
> + pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",
> + dw0, dw1);
> + } else {
> + flush_partition(lpid, old);
> + }
What is different is whether we flush or not.
And don't we still need to do the flush for the nestMMU? I assume we're
saying the ultravisor will broadcast a flush for us, which will also
handle the nestMMU case?
cheers
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 5/7] powerpc/mm: Write to PTCR only if ultravisor disabled
2019-08-08 4:05 ` [PATCH v5 5/7] powerpc/mm: Write to PTCR only if ultravisor disabled Claudio Carvalho
@ 2019-08-14 12:04 ` Michael Ellerman
0 siblings, 0 replies; 20+ messages in thread
From: Michael Ellerman @ 2019-08-14 12:04 UTC (permalink / raw)
To: Claudio Carvalho, linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
Claudio Carvalho <cclaudio@linux.ibm.com> writes:
> In ultravisor enabled systems, PTCR becomes ultravisor privileged only
> for writing and an attempt to write to it will cause a Hypervisor
> Emulation Assitance interrupt.
>
> This patch adds the try_set_ptcr(val) macro as an accessor to
> mtspr(SPRN_PTCR, val), which will be executed only if ultravisor
> disabled.
>
> Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
> ---
> arch/powerpc/include/asm/reg.h | 13 +++++++++++++
> arch/powerpc/mm/book3s64/hash_utils.c | 4 ++--
> arch/powerpc/mm/book3s64/pgtable.c | 2 +-
> arch/powerpc/mm/book3s64/radix_pgtable.c | 6 +++---
> 4 files changed, 19 insertions(+), 6 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index 10caa145f98b..14139b1ebdb8 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -15,6 +15,7 @@
> #include <asm/cputable.h>
> #include <asm/asm-const.h>
> #include <asm/feature-fixups.h>
> +#include <asm/firmware.h>
reg.h is already too big and unwieldy.
Can you put this in ultravisor.h and include that in the appropriate places.
> @@ -1452,6 +1453,18 @@ static inline void update_power8_hid0(unsigned long hid0)
> */
> asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0));
> }
> +
> +/*
> + * In ultravisor enabled systems, PTCR becomes ultravisor privileged only for
> + * writing and an attempt to write to it will cause a Hypervisor Emulation
> + * Assistance interrupt.
> + */
> +#define try_set_ptcr(val) \
> + do { \
> + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) \
> + mtspr(SPRN_PTCR, val); \
> + } while (0)
This should be a static inline please, not a macro.
Sorry, I don't like the name, we're not trying to set it, we know when
to set it and when not to.
It is awkward to come up with a good name because we don't have a term
for "hypervisor that's not running under an ultravisor".
Maybe set_ptcr_when_no_uv()
Which is kinda messy, someone feel free to come up with something
better.
I also see some more accesses to the PTCR in
arch/powerpc/platforms/powernv/idle.c which you haven't patched?
cheers
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler
2019-08-14 10:46 ` Michael Ellerman
@ 2019-08-14 18:34 ` Segher Boessenkool
2019-08-22 1:26 ` Claudio Carvalho
2019-08-22 1:24 ` Claudio Carvalho
1 sibling, 1 reply; 20+ messages in thread
From: Segher Boessenkool @ 2019-08-14 18:34 UTC (permalink / raw)
To: Michael Ellerman
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, Claudio Carvalho,
kvm-ppc, Bharata B Rao, linuxppc-dev, Ryan Grimm,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
On Wed, Aug 14, 2019 at 08:46:15PM +1000, Michael Ellerman wrote:
> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
> > +_GLOBAL(ucall_norets)
> > +EXPORT_SYMBOL_GPL(ucall_norets)
> > + mfcr r0
> > + stw r0,8(r1)
> > +
> > + sc 2 /* Invoke the ultravisor */
> > +
> > + lwz r0,8(r1)
> > + mtcrf 0xff,r0
> > + blr /* Return r3 = status */
>
> Paulus points that we shouldn't need to save CR here. Our caller will
> have already saved it if it needed to, and we don't use CR in this
> function so we don't need to save it.
>
> That's assuming the Ultravisor follows the hcall ABI in which CR2-4 are
> non-volatile (PAPR § 14.5.3).
And assuming the ultravisor already clears (or sets, or whatever) all CR
fields it does not want to leak the contents of (which it also should,
of course).
> I know plpar_hcall_norets() does save CR, but it shouldn't need to, that
> seems to be historical. aka. no one knows why it does it but it always
> has.
Segher
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE
2019-08-14 11:33 ` Michael Ellerman
@ 2019-08-21 0:04 ` Sukadev Bhattiprolu
2019-08-22 1:33 ` Claudio Carvalho
1 sibling, 0 replies; 20+ messages in thread
From: Sukadev Bhattiprolu @ 2019-08-21 0:04 UTC (permalink / raw)
To: Michael Ellerman
Cc: Ryan Grimm, Madhavan Srinivasan, Michael Anderson, Ram Pai,
Claudio Carvalho, kvm-ppc, Bharata B Rao, linuxppc-dev,
Ryan Grimm, Guerney Hunt, Thiago Bauermann
Michael Ellerman [mpe@ellerman.id.au] wrote:
> Hi Claudio,
>
> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
> > From: Michael Anderson <andmike@linux.ibm.com>
> >
> > In ultravisor enabled systems, the ultravisor creates and maintains the
> > partition table in secure memory where the hypervisor cannot access, and
> ^
> which?
>
> > therefore, the hypervisor have to do the UV_WRITE_PATE ucall whenever it
> ^ ^
> has a
> > wants to set a partition table entry (PATE).
> >
> > This patch adds the UV_WRITE_PATE ucall and uses it to set a PATE if
> > ultravisor is enabled. Additionally, this also also keeps a copy of the
> > partition table because the nestMMU does not have access to secure
> > memory. Such copy has entries for nonsecure and hypervisor partition.
>
> I'm having trouble parsing the last sentence there.
>
> Or at least it doesn't seem to match the code, or I don't understand
> either the code or the comment. More below.
Yes, good catch. We could drop the last sentence. Or maybe change the
last para to:
This patch adds the UV_WRITE_PATE ucall which is used to update
the partition table entry (PATE) for a VM (both normal and secure).
When UV is enabled, the partition table is stored in secure memory
and can only be accessed via the UV. The HV however maintains a
copy of the partition table in normal memory to allow NMMU
translations to occur (for normal VMs). The HV copy includes PATEs
for secure VMs which would currently be unused (NMMU translations
cannot access secure memory) but they would be needed as we add
functionality.
Basically, with UV, PTCR is controlled by the UV and address translations
occur based on the UV's copy of the partition table. (See also:
try_set_ptcr() in "PATCH 5/7 powerpc/mm: Write to PTCR only if ultravisor
disabled")
>
> > diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c
> > index 85bc81abd286..033731f5dbaa 100644
> > --- a/arch/powerpc/mm/book3s64/pgtable.c
> > +++ b/arch/powerpc/mm/book3s64/pgtable.c
> > @@ -213,34 +223,50 @@ void __init mmu_partition_table_init(void)
> > powernv_set_nmmu_ptcr(ptcr);
> > }
> >
> > -void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
> > - unsigned long dw1)
> > +/*
> > + * Global flush of TLBs and partition table caches for this lpid. The type of
> > + * flush (hash or radix) depends on what the previous use of this partition ID
> > + * was, not the new use.
> > + */
> > +static void flush_partition(unsigned int lpid, unsigned long old_patb0)
>
> A nicer API would be for the 2nd param to be a "bool radix", and have
> the caller worry about the fact that it comes from (patb0 & PATB_HR).
Agree
>
> > {
> > - unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
> > -
> > - partition_tb[lpid].patb0 = cpu_to_be64(dw0);
> > - partition_tb[lpid].patb1 = cpu_to_be64(dw1);
> > -
> > - /*
> > - * Global flush of TLBs and partition table caches for this lpid.
> > - * The type of flush (hash or radix) depends on what the previous
> > - * use of this partition ID was, not the new use.
> > - */
> > asm volatile("ptesync" : : : "memory");
> > - if (old & PATB_HR) {
> > - asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
> > + if (old_patb0 & PATB_HR) {
> > + asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 1) : :
> > "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
> > - asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
> > + asm volatile(PPC_TLBIE_5(%0, %1, 2, 1, 1) : :
>
> That looks like an unrelated whitespace change.
>
> > "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
> > trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
> > } else {
> > - asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
> > + asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 0) : :
>
> Ditto.
>
> > "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
> > trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
> > }
> > /* do we need fixup here ?*/
> > asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> > }
> > +
> > +void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
> > + unsigned long dw1)
> > +{
> > + unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
> > +
> > + partition_tb[lpid].patb0 = cpu_to_be64(dw0);
> > + partition_tb[lpid].patb1 = cpu_to_be64(dw1);
>
> ie. here we always update the copy of the partition table, regardless of
> whether we're running under an ultravisor or not. So the copy is a
> complete copy isn't it?
Yes.
>
> > + /*
> > + * In ultravisor enabled systems, the ultravisor maintains the partition
> > + * table in secure memory where we don't have access, therefore, we have
> > + * to do a ucall to set an entry.
> > + */
> > + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) {
> > + uv_register_pate(lpid, dw0, dw1);
> > + pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",
> > + dw0, dw1);
> > + } else {
> > + flush_partition(lpid, old);
> > + }
>
> What is different is whether we flush or not.
only differences are where the partition table used by hardware is stored
(secure memory) and updated (in UV, with higher privilege).
>
> And don't we still need to do the flush for the nestMMU? I assume we're
> saying the ultravisor will broadcast a flush for us, which will also
> handle the nestMMU case?
The same sequence of instructions (as HV) are used in uv_register_pate()
to flush partition and process scoped entries (so nest MMU would also be
covered when NMMU sees the tlbie?)
Thanks,
Sukadev
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API
2019-08-12 15:58 ` Fabiano Rosas
@ 2019-08-21 22:01 ` Claudio Carvalho
0 siblings, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-21 22:01 UTC (permalink / raw)
To: Fabiano Rosas, linuxppc-dev
Cc: Madhavan Srinivasan, Sukadev Bhattiprolu, Michael Anderson,
Ram Pai, kvm-ppc, Bharata B Rao, Ryan Grimm, Ram Pai,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
On 8/12/19 12:58 PM, Fabiano Rosas wrote:
> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
>
> Some small suggestions below:
>
>> +
>> + * The privilege of a process is now determined by three MSR bits,
>> + MSR(S, HV, PR). In each of the tables below the modes are listed
>> + from least privilege to highest privilege. The higher privilege
>> + modes can access all the resources of the lower privilege modes.
>> +
>> + **Secure Mode MSR Settings**
>> +
>> + +---+---+---+---------------+
>> + | S | HV| PR|Privilege |
>> + +===+===+===+===============+
>> + | 1 | 0 | 1 | Problem |
>> + +---+---+---+---------------+
>> + | 1 | 0 | 0 | Privileged(OS)|
>> + +---+---+---+---------------+
>> + | 1 | 1 | 0 | Ultravisor |
>> + +---+---+---+---------------+
>> + | 1 | 1 | 1 | Reserved |
>> + +---+---+---+---------------+
>> +
>> + **Normal Mode MSR Settings**
>> +
>> + +---+---+---+---------------+
>> + | S | HV| PR|Privilege |
>> + +===+===+===+===============+
>> + | 0 | 0 | 1 | Problem |
>> + +---+---+---+---------------+
>> + | 0 | 0 | 0 | Privileged(OS)|
>> + +---+---+---+---------------+
>> + | 0 | 1 | 0 | Hypervisor |
>> + +---+---+---+---------------+
>> + | 0 | 1 | 1 | Problem (HV) |
>> + +---+---+---+---------------+
> I find the use of '(HV)' in this last line a bit ambiguous. Since we are
> already using 'HV' to refer to MSR(HV). I'd suggest using '(Host)' or
> simply leaving it out.
>
>> +
>> + * Memory is partitioned into secure and normal memory. Only processes
>> + that are running in secure mode can access secure memory.
>> +
>> + * The hardware does not allow anything that is not running secure to
>> + access secure memory. This means that the Hypervisor cannot access
>> + the memory of the SVM without using an ultracall (asking the
>> + Ultravisor). The Ultravisor will only allow the hypervisor to see
>> + the SVM memory encrypted.
>> +
>> + * I/O systems are not allowed to directly address secure memory. This
>> + limits the SVMs to virtual I/O only.
>> +
>> + * The architecture allows the SVM to share pages of memory with the
>> + hypervisor that are not protected with encryption. However, this
>> + sharing must be initiated by the SVM.
>> +
>> + * When a process is running in secure mode all hypercalls
>> + (syscall lev=1) are reflected to the Ultravisor.
> Here 'reflected' refers to the Ultravisor. Later on, it is used as
> meaning the Ultravisor reflects hypercalls/interrupts to the
> Hypervisor. I suggest we use this term to mean the latter only.
>
>> +
>> + * When a process is in secure mode all interrupts go to the
>> + Ultravisor.
>> +
>> + * The following resources have become Ultravisor privileged and
>> + require an Ultravisor interface to manipulate:
>> +
>> + * Processor configurations registers (SCOMs).
>> +
>> + * Stop state information.
>> +
>> + * The debug registers CIABR, DAWR, and DAWRX become Ultravisor
>> + resources when SMFCTRL(D) is set. If SMFCTRL(D) is not set they do
> It looks like you could go without "become Ultravisor resources" since
> it is already mentioned in the parent item above (The following...).
>
>> + not work in secure mode. When set, reading and writing requires
>> + an Ultravisor call, otherwise that will cause a Hypervisor Emulation
>> + Assistance interrupt.
>> +
>> + * PTCR and partition table entries (partition table is in secure
>> + memory). An attempt to write to PTCR will cause a Hypervisor
>> + Emulation Assitance interrupt.
>> +
>> + * LDBAR (LD Base Address Register) and IMC (In-Memory Collection)
>> + non-architected registers. An attempt to write to them will cause a
>> + Hypervisor Emulation Assistance interrupt.
>> +
>> + * Paging for an SVM, sharing of memory with Hypervisor for an SVM.
>> + (Including Virtual Processor Area (VPA) and virtual I/O).
>> +
>> +
>> +Software/Microcode
>> +==================
>> +
>> + The software changes include:
>> +
>> + * SVMs are created from normal VM using (open source) tooling supplied
>> + by IBM.
>> +
>> + * All SVMs start as normal VMs and utilize an ultracall, UV_ESM
>> + (Enter Secure Mode), to make the transition.
>> +
>> + * When the UV_ESM ultracall is made the Ultravisor copies the VM into
>> + secure memory, decrypts the verification information, and checks the
>> + integrity of the SVM. If the integrity check passes the Ultravisor
>> + passes control in secure mode.
>> +
>> + * For external interrupts the Ultravisor saves the state of the SVM,
>> + and reflects the interrupt to the hypervisor for processing.
>> + For hypercalls, the Ultravisor inserts neutral state into all
>> + registers not needed for the hypercall then reflects the call to
>> + the hypervisor for processing. The H_RANDOM hypercall is performed
>> + by the Ultravisor and not reflected.
>> +
>> + * The verification information includes the pass phrase for the
>> + encrypted disk associated with the SVM. This pass phrase is given
>> + to the SVM when requested.
> This is the second mention of 'verification information'. Could we
> perhaps move this up after "SMVs are created..."
> and rephrase it in a way
> that introduces the concept? What/where/in what state is the
> verification information?
Thanks for reviewing the patch Fabiano. I addressed all your suggestions in
the next version, except the one above because the "verification
information" concept is big and it is not related to the kernel.
Claudio.
>> +
>> + * The Ultravisor is not involved in protecting the encrypted disk of
>> + the SVM while at rest.
>> +
>> + * For virtual I/O to work bounce buffering must be done.
>> +
>> + * The Ultravisor uses AES (IAPM) for protection of SVM memory. IAPM
>> + is a mode of AES that provides integrity and secrecy concurrently.
>> +
>> + * The movement of data between normal and secure pages is coordinated
>> + with the Ultravisor by a new HMM plug-in in the Hypervisor.
>> +
>> + The Ultravisor offers new services to the hypervisor and SVMs. These
>> + are accessed through ultracalls.
>> +
>> +Terminology
>> +===========
>> +
>> + * Hypercalls: special system calls used to request services from
>> + Hypervisor.
>> +
>> + * Normal memory: Memory that is accessible to Hypervisor.
>> +
>> + * Normal page: Page backed by normal memory and available to
>> + Hypervisor.
>> +
>> + * Shared page: A page backed by normal memory and available to both
>> + the Hypervisor/QEMU and the SVM (i.e page has mappings in SVM and
>> + Hypervisor/QEMU).
>> +
>> + * Secure memory: Memory that is accessible only to Ultravisor and
>> + SVMs.
>> +
>> + * Secure page: Page backed by secure memory and only available to
>> + Ultravisor and SVM.
>> +
>> + * SVM: Secure Virtual Machine.
>> +
>> + * Ultracalls: special system calls used to request services from
>> + Ultravisor.
>> +
>> +
>> +Ultravisor calls API
>> +####################
>> +
>> + This section describes Ultravisor calls (ultracalls) needed to
>> + support Secure Virtual Machines (SVM)s and Paravirtalized KVM. The
> Paravirtualized
>
>> + ultracalls allow the SVMs and Hypervisor to request services from the
>> + Ultravisor such as accessing a register or memory region that can only
>> + be accessed when running in Ultravisor-privileged mode.
>> +
>> + The specific service needed from an ultracall is specified in register
>> + R3 (the first parameter to the ultracall). Other parameters to the
>> + ultracall, if any, are specified in registers R4 through R12.
>> +
>> + Return value of all ultracalls is in register R3. Other output values
>> + from the ultracall, if any, are returned in registers R4 through R12.
>> + The only exception to this register usage is the ``UV_RETURN``
>> + ultracall described below.
>> +
>> + Each ultracall returns specific error codes, applicable in the context
>> + of the ultracall. However, like with the PowerPC Architecture Platform
>> + Reference (PAPR), if no specific error code is defined for a
>> + particular situation, then the ultracall will fallback to an erroneous
>> + parameter-position based code. i.e U_PARAMETER, U_P2, U_P3 etc
>> + depending on the ultracall parameter that may have caused the error.
>> +
>> + Some ultracalls involve transferring a page of data between Ultravisor
>> + and Hypervisor. Secure pages that are transferred from secure memory
>> + to normal memory may be encrypted using dynamically generated keys.
>> + When the secure pages are transferred back to secure memory, they may
>> + be decrypted using the same dynamically generated keys. Generation and
>> + management of these keys will be covered in a separate document.
>> +
>> + For now this only covers ultracalls currently implemented and being
>> + used by Hypervisor and SVMs but others can be added here when it
>> + makes sense.
>> +
>> + The full specification for all hypercalls/ultracalls will eventually
>> + be made available in the public/OpenPower version of the PAPR
>> + specification.
>> +
>> + **Note**
>> +
>> + If PEF is not enabled, the ultracalls will be redirected to the
>> + Hypervisor which must handle/fail the calls.
>> +
>> +Ultracalls used by Hypervisor
>> +=============================
>> +
>> + This section describes the virtual memory management ultracalls used
>> + by the Hypervisor to manage SVMs.
>> +
>> +UV_PAGE_OUT
>> +-----------
>> +
>> + Encrypt and move the contents of a page from secure memory to normal
>> + memory.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_PAGE_OUT,
>> + uint16_t lpid, /* LPAR ID */
>> + uint64_t dest_ra, /* real address of destination page */
>> + uint64_t src_gpa, /* source guest-physical-address */
>> + uint8_t flags, /* flags */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``dest_ra`` is invalid.
>> + * U_P3 if the ``src_gpa`` address is invalid.
>> + * U_P4 if any bit in the ``flags`` is unrecognized
>> + * U_P5 if the ``order`` parameter is unsupported.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_BUSY if page cannot be currently paged-out.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Encrypt the contents of a secure-page and make it available to
>> + Hypervisor in a normal page.
>> +
>> + By default, the source page is unmapped from the SVM's partition-
>> + scoped page table. But the Hypervisor can provide a hint to the
>> + Ultravisor to retain the page mapping by setting the ``UV_SNAPSHOT``
>> + flag in ``flags`` parameter.
>> +
>> + If the source page is already a shared page the call returns
>> + U_SUCCESS, without doing anything.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. QEMU attempts to access an address belonging to the SVM but the
>> + page frame for that address is not mapped into QEMU's address
>> + space. In this case, the Hypervisor will allocate a page frame,
>> + map it into QEMU's address space and issue the ``UV_PAGE_OUT``
>> + call to retrieve the encrypted contents of the page.
>> +
>> + #. When Ultravisor runs low on secure memory and it needs to page-out
>> + an LRU page. In this case, Ultravisor will issue the
>> + ``H_SVM_PAGE_OUT`` hypercall to the Hypervisor. The Hypervisor will
>> + then allocate a normal page and issue the ``UV_PAGE_OUT`` ultracall
>> + and the Ultravisor will encrypt and move the contents of the secure
>> + page into the normal page.
>> +
>> +
>> +UV_PAGE_IN
>> +----------
>> +
>> + Move the contents of a page from normal memory to secure memory.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_PAGE_IN,
>> + uint16_t lpid, /* the LPAR ID */
>> + uint64_t src_ra, /* source real address of page */
>> + uint64_t dest_gpa, /* destination guest physical address */
>> + uint64_t flags, /* flags */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_BUSY if page cannot be currently paged-in.
>> + * U_FUNCTION if functionality is not supported
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``src_ra`` is invalid.
>> + * U_P3 if the ``dest_gpa`` address is invalid.
>> + * U_P4 if any bit in the ``flags`` is unrecognized
>> + * U_P5 if the ``order`` parameter is unsupported.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Move the contents of the page identified by ``src_ra`` from normal
>> + memory to secure memory and map it to the guest physical address
>> + ``dest_gpa``.
>> +
>> + If `dest_gpa` refers to a shared address, map the page into the
>> + partition-scoped page-table of the SVM. If `dest_gpa` is not shared,
>> + copy the contents of the page into the corresponding secure page.
>> + Depending on the context, decrypt the page before being copied.
>> +
>> + The caller provides the attributes of the page through the ``flags``
>> + parameter. Valid values for ``flags`` are:
>> +
>> + * CACHE_INHIBITED
>> + * CACHE_ENABLED
>> + * WRITE_PROTECTION
>> +
>> + The Hypervisor must pin the page in memory before making
>> + ``UV_PAGE_IN`` ultracall.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. When a normal VM switches to secure mode, all its pages residing
>> + in normal memory, are moved into secure memory.
>> +
>> + #. When an SVM requests to share a page with Hypervisor the Hypervisor
>> + allocates a page and informs the Ultravisor.
>> +
>> + #. When an SVM accesses a secure page that has been paged-out,
>> + Ultravisor invokes the Hypervisor to locate the page. After
>> + locating the page, the Hypervisor uses UV_PAGE_IN to make the
>> + page available to Ultravisor.
>> +
>> + #. When Hypervisor accesses SVM data, the Hypervisor requests the
>> + Ultravisor to transfer the corresponding page into a insecure page,
>> + which the Hypervisor can access. The data in the normal page will
>> + be encrypted though.
> This looks like it should be under UV_PAGE_OUT instead.
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API
2019-08-09 12:45 ` Michael Ellerman
@ 2019-08-21 22:30 ` Claudio Carvalho
0 siblings, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-21 22:30 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, kvm-ppc,
Bharata B Rao, Ryan Grimm, Ram Pai, Sukadev Bhattiprolu,
Sukadev Bhattiprolu, Guerney Hunt, Thiago Bauermann
On 8/9/19 9:45 AM, Michael Ellerman wrote:
> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
>> From: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
>>
>> POWER9 processor includes support for Protected Execution Facility (PEF).
>> Which POWER9? Please be more precise.
>>
>> It's public knowledge that some versions of Power9 don't have PEF (or
>> have it broken / fused off).
>>
>> People are going to try and test this on various chip revisions that are
>> out in the wild, we need to make it clear where it's expected to work
>> and where it's not.
Updated this part of the commit message to:
Protected Execution Facility (PEF) is an architectural change for
POWER 9 that enables Secure Virtual Machines (SVMs). When enabled,
PEF adds a new higher privileged mode, called Ultravisor mode, to POWER
architecture. Along with the new mode there is new firmware called the
Protected Execution Ultravisor (or Ultravisor for short).
POWER 9 DD2.3 chips (PVR=0x004e1203) or greater will be PEF-capable.
Attached documentation ...
>
>> Attached documentation provides an overview of PEF and defines the API
>> for various interfaces that must be implemented in the Ultravisor
>> firmware as well as in the KVM Hypervisor.
>>
>> Based on input from Mike Anderson, Thiago Bauermann, Claudio Carvalho,
>> Ben Herrenschmidt, Guerney Hunt, Paul Mackerras.
>>
>> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
>> Signed-off-by: Ram Pai <linuxram@linux.ibm.com>
>> Signed-off-by: Guerney Hunt <gdhh@linux.ibm.com>
>> Reviewed-by: Claudio Carvalho <cclaudio@linux.ibm.com>
>> Reviewed-by: Michael Anderson <andmike@linux.ibm.com>
>> Reviewed-by: Thiago Bauermann <bauerman@linux.ibm.com>
>> Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
>> ---
>> Documentation/powerpc/ultravisor.rst | 1055 ++++++++++++++++++++++++++
>> 1 file changed, 1055 insertions(+)
>> create mode 100644 Documentation/powerpc/ultravisor.rst
>>
>> diff --git a/Documentation/powerpc/ultravisor.rst b/Documentation/powerpc/ultravisor.rst
>> new file mode 100644
>> index 000000000000..8d5246585b66
>> --- /dev/null
>> +++ b/Documentation/powerpc/ultravisor.rst
>> @@ -0,0 +1,1055 @@
>> +.. SPDX-License-Identifier: GPL-2.0
>> +.. _ultravisor:
>> +
>> +============================
>> +Protected Execution Facility
>> +============================
>> +
>> +.. contents::
>> + :depth: 3
>> +
>> +.. sectnum::
>> + :depth: 3
>> +
>> +Protected Execution Facility
>> +############################
>> +
>> + Protected Execution Facility (PEF) is an architectural change for
>> + POWER 9 that enables Secure Virtual Machines (SVMs). When enabled,
> Ditto here.
>
> Also you don't mention which ISA version PEF is (will be) documented in.
> Do we know? Or can we at least reference the RFC number so folks can
> find it.
>
> Otherwise this looks really good. I'll try and find time to proof read
> it thoroughly.
>
> cheers
>
>> + PEF adds a new higher privileged mode, called Ultravisor mode, to
>> + POWER architecture. Along with the new mode there is new firmware
>> + called the Protected Execution Ultravisor (or Ultravisor for short).
>> + Ultravisor mode is the highest privileged mode in POWER architecture.
Updated this part to:
Protected Execution Facility (PEF) is an architectural change for
POWER 9 that enables Secure Virtual Machines (SVMs). DD2.3 chips
(PVR=0x004e1203) or greater will be PEF-capable. A new ISA release
will include the PEF RFC02487 changes.
When enabled, PEF adds a new higher privileged mode, called Ultravisor
mode, to POWER architecture. Along with the new mode there is new
firmware called the Protected Execution Ultravisor (or Ultravisor
for short). Ultravisor mode is the highest privileged mode in POWER
architecture.
Followed by the original table below.
Thanks Michael
Claudio.
>> +
>> + +------------------+
>> + | Privilege States |
>> + +==================+
>> + | Problem |
>> + +------------------+
>> + | Supervisor |
>> + +------------------+
>> + | Hypervisor |
>> + +------------------+
>> + | Ultravisor |
>> + +------------------+
>> +
>> + PEF protects SVMs from the hypervisor, privileged users, and other
>> + VMs in the system. SVMs are protected while at rest and can only be
>> + executed by an authorized machine. All virtual machines utilize
>> + hypervisor services. The Ultravisor filters calls between the SVMs
>> + and the hypervisor to assure that information does not accidentally
>> + leak. All hypercalls except H_RANDOM are reflected to the hypervisor.
>> + H_RANDOM is not reflected to prevent the hypervisor from influencing
>> + random values in the SVM.
>> +
>> + To support this there is a refactoring of the ownership of resources
>> + in the CPU. Some of the resources which were previously hypervisor
>> + privileged are now ultravisor privileged.
>> +
>> +Hardware
>> +========
>> +
>> + The hardware changes include the following:
>> +
>> + * There is a new bit in the MSR that determines whether the current
>> + process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process
>> + is in secure mode, MSR(s)=0 process is in normal mode.
>> +
>> + * The MSR(S) bit can only be set by the Ultravisor.
>> +
>> + * HRFID cannot be used to set the MSR(S) bit. If the hypervisor needs
>> + to return to a SVM it must use an ultracall. It can determine if
>> + the VM it is returning to is secure.
>> +
>> + * There is a new Ultravisor privileged register, SMFCTRL, which has an
>> + enable/disable bit SMFCTRL(E).
>> +
>> + * The privilege of a process is now determined by three MSR bits,
>> + MSR(S, HV, PR). In each of the tables below the modes are listed
>> + from least privilege to highest privilege. The higher privilege
>> + modes can access all the resources of the lower privilege modes.
>> +
>> + **Secure Mode MSR Settings**
>> +
>> + +---+---+---+---------------+
>> + | S | HV| PR|Privilege |
>> + +===+===+===+===============+
>> + | 1 | 0 | 1 | Problem |
>> + +---+---+---+---------------+
>> + | 1 | 0 | 0 | Privileged(OS)|
>> + +---+---+---+---------------+
>> + | 1 | 1 | 0 | Ultravisor |
>> + +---+---+---+---------------+
>> + | 1 | 1 | 1 | Reserved |
>> + +---+---+---+---------------+
>> +
>> + **Normal Mode MSR Settings**
>> +
>> + +---+---+---+---------------+
>> + | S | HV| PR|Privilege |
>> + +===+===+===+===============+
>> + | 0 | 0 | 1 | Problem |
>> + +---+---+---+---------------+
>> + | 0 | 0 | 0 | Privileged(OS)|
>> + +---+---+---+---------------+
>> + | 0 | 1 | 0 | Hypervisor |
>> + +---+---+---+---------------+
>> + | 0 | 1 | 1 | Problem (HV) |
>> + +---+---+---+---------------+
>> +
>> + * Memory is partitioned into secure and normal memory. Only processes
>> + that are running in secure mode can access secure memory.
>> +
>> + * The hardware does not allow anything that is not running secure to
>> + access secure memory. This means that the Hypervisor cannot access
>> + the memory of the SVM without using an ultracall (asking the
>> + Ultravisor). The Ultravisor will only allow the hypervisor to see
>> + the SVM memory encrypted.
>> +
>> + * I/O systems are not allowed to directly address secure memory. This
>> + limits the SVMs to virtual I/O only.
>> +
>> + * The architecture allows the SVM to share pages of memory with the
>> + hypervisor that are not protected with encryption. However, this
>> + sharing must be initiated by the SVM.
>> +
>> + * When a process is running in secure mode all hypercalls
>> + (syscall lev=1) are reflected to the Ultravisor.
>> +
>> + * When a process is in secure mode all interrupts go to the
>> + Ultravisor.
>> +
>> + * The following resources have become Ultravisor privileged and
>> + require an Ultravisor interface to manipulate:
>> +
>> + * Processor configurations registers (SCOMs).
>> +
>> + * Stop state information.
>> +
>> + * The debug registers CIABR, DAWR, and DAWRX become Ultravisor
>> + resources when SMFCTRL(D) is set. If SMFCTRL(D) is not set they do
>> + not work in secure mode. When set, reading and writing requires
>> + an Ultravisor call, otherwise that will cause a Hypervisor Emulation
>> + Assistance interrupt.
>> +
>> + * PTCR and partition table entries (partition table is in secure
>> + memory). An attempt to write to PTCR will cause a Hypervisor
>> + Emulation Assitance interrupt.
>> +
>> + * LDBAR (LD Base Address Register) and IMC (In-Memory Collection)
>> + non-architected registers. An attempt to write to them will cause a
>> + Hypervisor Emulation Assistance interrupt.
>> +
>> + * Paging for an SVM, sharing of memory with Hypervisor for an SVM.
>> + (Including Virtual Processor Area (VPA) and virtual I/O).
>> +
>> +
>> +Software/Microcode
>> +==================
>> +
>> + The software changes include:
>> +
>> + * SVMs are created from normal VM using (open source) tooling supplied
>> + by IBM.
>> +
>> + * All SVMs start as normal VMs and utilize an ultracall, UV_ESM
>> + (Enter Secure Mode), to make the transition.
>> +
>> + * When the UV_ESM ultracall is made the Ultravisor copies the VM into
>> + secure memory, decrypts the verification information, and checks the
>> + integrity of the SVM. If the integrity check passes the Ultravisor
>> + passes control in secure mode.
>> +
>> + * For external interrupts the Ultravisor saves the state of the SVM,
>> + and reflects the interrupt to the hypervisor for processing.
>> + For hypercalls, the Ultravisor inserts neutral state into all
>> + registers not needed for the hypercall then reflects the call to
>> + the hypervisor for processing. The H_RANDOM hypercall is performed
>> + by the Ultravisor and not reflected.
>> +
>> + * The verification information includes the pass phrase for the
>> + encrypted disk associated with the SVM. This pass phrase is given
>> + to the SVM when requested.
>> +
>> + * The Ultravisor is not involved in protecting the encrypted disk of
>> + the SVM while at rest.
>> +
>> + * For virtual I/O to work bounce buffering must be done.
>> +
>> + * The Ultravisor uses AES (IAPM) for protection of SVM memory. IAPM
>> + is a mode of AES that provides integrity and secrecy concurrently.
>> +
>> + * The movement of data between normal and secure pages is coordinated
>> + with the Ultravisor by a new HMM plug-in in the Hypervisor.
>> +
>> + The Ultravisor offers new services to the hypervisor and SVMs. These
>> + are accessed through ultracalls.
>> +
>> +Terminology
>> +===========
>> +
>> + * Hypercalls: special system calls used to request services from
>> + Hypervisor.
>> +
>> + * Normal memory: Memory that is accessible to Hypervisor.
>> +
>> + * Normal page: Page backed by normal memory and available to
>> + Hypervisor.
>> +
>> + * Shared page: A page backed by normal memory and available to both
>> + the Hypervisor/QEMU and the SVM (i.e page has mappings in SVM and
>> + Hypervisor/QEMU).
>> +
>> + * Secure memory: Memory that is accessible only to Ultravisor and
>> + SVMs.
>> +
>> + * Secure page: Page backed by secure memory and only available to
>> + Ultravisor and SVM.
>> +
>> + * SVM: Secure Virtual Machine.
>> +
>> + * Ultracalls: special system calls used to request services from
>> + Ultravisor.
>> +
>> +
>> +Ultravisor calls API
>> +####################
>> +
>> + This section describes Ultravisor calls (ultracalls) needed to
>> + support Secure Virtual Machines (SVM)s and Paravirtalized KVM. The
>> + ultracalls allow the SVMs and Hypervisor to request services from the
>> + Ultravisor such as accessing a register or memory region that can only
>> + be accessed when running in Ultravisor-privileged mode.
>> +
>> + The specific service needed from an ultracall is specified in register
>> + R3 (the first parameter to the ultracall). Other parameters to the
>> + ultracall, if any, are specified in registers R4 through R12.
>> +
>> + Return value of all ultracalls is in register R3. Other output values
>> + from the ultracall, if any, are returned in registers R4 through R12.
>> + The only exception to this register usage is the ``UV_RETURN``
>> + ultracall described below.
>> +
>> + Each ultracall returns specific error codes, applicable in the context
>> + of the ultracall. However, like with the PowerPC Architecture Platform
>> + Reference (PAPR), if no specific error code is defined for a
>> + particular situation, then the ultracall will fallback to an erroneous
>> + parameter-position based code. i.e U_PARAMETER, U_P2, U_P3 etc
>> + depending on the ultracall parameter that may have caused the error.
>> +
>> + Some ultracalls involve transferring a page of data between Ultravisor
>> + and Hypervisor. Secure pages that are transferred from secure memory
>> + to normal memory may be encrypted using dynamically generated keys.
>> + When the secure pages are transferred back to secure memory, they may
>> + be decrypted using the same dynamically generated keys. Generation and
>> + management of these keys will be covered in a separate document.
>> +
>> + For now this only covers ultracalls currently implemented and being
>> + used by Hypervisor and SVMs but others can be added here when it
>> + makes sense.
>> +
>> + The full specification for all hypercalls/ultracalls will eventually
>> + be made available in the public/OpenPower version of the PAPR
>> + specification.
>> +
>> + **Note**
>> +
>> + If PEF is not enabled, the ultracalls will be redirected to the
>> + Hypervisor which must handle/fail the calls.
>> +
>> +Ultracalls used by Hypervisor
>> +=============================
>> +
>> + This section describes the virtual memory management ultracalls used
>> + by the Hypervisor to manage SVMs.
>> +
>> +UV_PAGE_OUT
>> +-----------
>> +
>> + Encrypt and move the contents of a page from secure memory to normal
>> + memory.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_PAGE_OUT,
>> + uint16_t lpid, /* LPAR ID */
>> + uint64_t dest_ra, /* real address of destination page */
>> + uint64_t src_gpa, /* source guest-physical-address */
>> + uint8_t flags, /* flags */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``dest_ra`` is invalid.
>> + * U_P3 if the ``src_gpa`` address is invalid.
>> + * U_P4 if any bit in the ``flags`` is unrecognized
>> + * U_P5 if the ``order`` parameter is unsupported.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_BUSY if page cannot be currently paged-out.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Encrypt the contents of a secure-page and make it available to
>> + Hypervisor in a normal page.
>> +
>> + By default, the source page is unmapped from the SVM's partition-
>> + scoped page table. But the Hypervisor can provide a hint to the
>> + Ultravisor to retain the page mapping by setting the ``UV_SNAPSHOT``
>> + flag in ``flags`` parameter.
>> +
>> + If the source page is already a shared page the call returns
>> + U_SUCCESS, without doing anything.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. QEMU attempts to access an address belonging to the SVM but the
>> + page frame for that address is not mapped into QEMU's address
>> + space. In this case, the Hypervisor will allocate a page frame,
>> + map it into QEMU's address space and issue the ``UV_PAGE_OUT``
>> + call to retrieve the encrypted contents of the page.
>> +
>> + #. When Ultravisor runs low on secure memory and it needs to page-out
>> + an LRU page. In this case, Ultravisor will issue the
>> + ``H_SVM_PAGE_OUT`` hypercall to the Hypervisor. The Hypervisor will
>> + then allocate a normal page and issue the ``UV_PAGE_OUT`` ultracall
>> + and the Ultravisor will encrypt and move the contents of the secure
>> + page into the normal page.
>> +
>> +
>> +UV_PAGE_IN
>> +----------
>> +
>> + Move the contents of a page from normal memory to secure memory.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_PAGE_IN,
>> + uint16_t lpid, /* the LPAR ID */
>> + uint64_t src_ra, /* source real address of page */
>> + uint64_t dest_gpa, /* destination guest physical address */
>> + uint64_t flags, /* flags */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_BUSY if page cannot be currently paged-in.
>> + * U_FUNCTION if functionality is not supported
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``src_ra`` is invalid.
>> + * U_P3 if the ``dest_gpa`` address is invalid.
>> + * U_P4 if any bit in the ``flags`` is unrecognized
>> + * U_P5 if the ``order`` parameter is unsupported.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Move the contents of the page identified by ``src_ra`` from normal
>> + memory to secure memory and map it to the guest physical address
>> + ``dest_gpa``.
>> +
>> + If `dest_gpa` refers to a shared address, map the page into the
>> + partition-scoped page-table of the SVM. If `dest_gpa` is not shared,
>> + copy the contents of the page into the corresponding secure page.
>> + Depending on the context, decrypt the page before being copied.
>> +
>> + The caller provides the attributes of the page through the ``flags``
>> + parameter. Valid values for ``flags`` are:
>> +
>> + * CACHE_INHIBITED
>> + * CACHE_ENABLED
>> + * WRITE_PROTECTION
>> +
>> + The Hypervisor must pin the page in memory before making
>> + ``UV_PAGE_IN`` ultracall.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. When a normal VM switches to secure mode, all its pages residing
>> + in normal memory, are moved into secure memory.
>> +
>> + #. When an SVM requests to share a page with Hypervisor the Hypervisor
>> + allocates a page and informs the Ultravisor.
>> +
>> + #. When an SVM accesses a secure page that has been paged-out,
>> + Ultravisor invokes the Hypervisor to locate the page. After
>> + locating the page, the Hypervisor uses UV_PAGE_IN to make the
>> + page available to Ultravisor.
>> +
>> + #. When Hypervisor accesses SVM data, the Hypervisor requests the
>> + Ultravisor to transfer the corresponding page into a insecure page,
>> + which the Hypervisor can access. The data in the normal page will
>> + be encrypted though.
>> +
>> +UV_PAGE_INVAL
>> +-------------
>> +
>> + Invalidate the Ultravisor mapping of a page.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_PAGE_INVAL,
>> + uint16_t lpid, /* the LPAR ID */
>> + uint64_t guest_pa, /* destination guest-physical-address */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``guest_pa`` is invalid (or corresponds to a secure
>> + page mapping).
>> + * U_P3 if the ``order`` is invalid.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_BUSY if page cannot be currently invalidated.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + This ultracall informs Ultravisor that the page mapping in Hypervisor
>> + corresponding to the given guest physical address has been invalidated
>> + and that the Ultravisor should not access the page. If the specified
>> + ``guest_pa`` corresponds to a secure page, Ultravisor will ignore the
>> + attempt to invalidate the page and return U_P2.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. When a shared page is unmapped from the QEMU's page table, possibly
>> + because it is paged-out to disk, Ultravisor needs to know that the
>> + page should not be accessed from its side too.
>> +
>> +
>> +UV_WRITE_PATE
>> +-------------
>> +
>> + Validate and write the partition table entry (PATE) for a given
>> + partition.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_WRITE_PATE,
>> + uint32_t lpid, /* the LPAR ID */
>> + uint64_t dw0 /* the first double word to write */
>> + uint64_t dw1) /* the second double word to write */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_BUSY if PATE cannot be currently written to.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``dw0`` is invalid.
>> + * U_P3 if the ``dw1`` address is invalid.
>> + * U_PERMISSION if the Hypervisor is attempting to change the PATE
>> + of a secure virtual machine or if called from a
>> + context other than Hypervisor.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Validate and write a LPID and its partition-table-entry for the given
>> + LPID. If the LPID is already allocated and initialized, this call
>> + results in changing the partition table entry.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. The Partition table resides in Secure memory and its entries,
>> + called PATE (Partition Table Entries), point to the partition-
>> + scoped page tables for the Hypervisor as well as each of the
>> + virtual machines (both secure and normal). The Hypervisor
>> + operates in partition 0 and its partition-scoped page tables
>> + reside in normal memory.
>> +
>> + #. This ultracall allows the Hypervisor to register the partition-
>> + scoped and process-scoped page table entries for the Hypervisor
>> + and other partitions (virtual machines) with the Ultravisor.
>> +
>> + #. If the value of the PATE for an existing partition (VM) changes,
>> + the TLB cache for the partition is flushed.
>> +
>> + #. The Hypervisor is responsible for allocating LPID. The LPID and
>> + its PATE entry are registered together. The Hypervisor manages
>> + the PATE entries for a normal VM and can change the PATE entry
>> + anytime. Ultravisor manages the PATE entries for an SVM and
>> + Hypervisor is not allowed to modify them.
>> +
>> +UV_RETURN
>> +---------
>> +
>> + Return control from the Hypervisor back to the Ultravisor after
>> + processing an hypercall or interrupt that was forwarded (aka
>> + *reflected*) to the Hypervisor.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_RETURN)
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + This call never returns to Hypervisor on success. It returns
>> + U_INVALID if ultracall is not made from a Hypervisor context.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + When an SVM makes an hypercall or incurs some other exception, the
>> + Ultravisor usually forwards (aka *reflects*) the exceptions to the
>> + Hypervisor. After processing the exception, Hypervisor uses the
>> + ``UV_RETURN`` ultracall to return control back to the SVM.
>> +
>> + The expected register state on entry to this ultracall is:
>> +
>> + * Non-volatile registers are restored to their original values.
>> + * If returning from an hypercall, register R0 contains the return
>> + value (**unlike other ultracalls**) and, registers R4 through R12
>> + contain any output values of the hypercall.
>> + * R3 contains the ultracall number, i.e UV_RETURN.
>> + * If returning with a synthesized interrupt, R2 contains the
>> + synthesized interrupt number.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. Ultravisor relies on the Hypervisor to provide several services to
>> + the SVM such as processing hypercall and other exceptions. After
>> + processing the exception, Hypervisor uses UV_RETURN to return
>> + control back to the Ultravisor.
>> +
>> + #. Hypervisor has to use this ultracall to return control to the SVM.
>> +
>> +
>> +UV_REGISTER_MEM_SLOT
>> +--------------------
>> +
>> + Register an SVM address-range with specified properties.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_REGISTER_MEM_SLOT,
>> + uint64_t lpid, /* LPAR ID of the SVM */
>> + uint64_t start_gpa, /* start guest physical address */
>> + uint64_t size, /* size of address range in bytes */
>> + uint64_t flags /* reserved for future expansion */
>> + uint16_t slotid) /* slot identifier */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``start_gpa`` is invalid.
>> + * U_P3 if ``size`` is invalid.
>> + * U_P4 if any bit in the ``flags`` is unrecognized.
>> + * U_P5 if the ``slotid`` parameter is unsupported.
>> + * U_PERMISSION if called from context other than Hypervisor.
>> + * U_FUNCTION if functionality is not supported.
>> +
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Register a memory range for an SVM. The memory range starts at the
>> + guest physical address ``start_gpa`` and is ``size`` bytes long.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> +
>> + #. When a virtual machine goes secure, all the memory slots managed by
>> + the Hypervisor move into secure memory. The Hypervisor iterates
>> + through each of memory slots, and registers the slot with
>> + Ultravisor. Hypervisor may discard some slots such as those used
>> + for firmware (SLOF).
>> +
>> + #. When new memory is hot-plugged, a new memory slot gets registered.
>> +
>> +
>> +UV_UNREGISTER_MEM_SLOT
>> +----------------------
>> +
>> + Unregister an SVM address-range that was previously registered using
>> + UV_REGISTER_MEM_SLOT.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_UNREGISTER_MEM_SLOT,
>> + uint64_t lpid, /* LPAR ID of the SVM */
>> + uint64_t slotid) /* reservation slotid */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_P2 if ``slotid`` is invalid.
>> + * U_PERMISSION if called from context other than Hypervisor.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Release the memory slot identified by ``slotid`` and free any
>> + resources allocated towards the reservation.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. Memory hot-remove.
>> +
>> +
>> +UV_SVM_TERMINATE
>> +----------------
>> +
>> + Terminate an SVM and release its resources.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_SVM_TERMINATE,
>> + uint64_t lpid, /* LPAR ID of the SVM */)
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_PARAMETER if ``lpid`` is invalid.
>> + * U_INVALID if VM is not secure.
>> + * U_PERMISSION if not called from a Hypervisor context.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Terminate an SVM and release all its resources.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. Called by Hypervisor when terminating an SVM.
>> +
>> +
>> +Ultracalls used by SVM
>> +======================
>> +
>> +UV_SHARE_PAGE
>> +-------------
>> +
>> + Share a set of guest physical pages with the Hypervisor.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_SHARE_PAGE,
>> + uint64_t gfn, /* guest page frame number */
>> + uint64_t num) /* number of pages of size PAGE_SIZE */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_INVALID if the VM is not secure.
>> + * U_PARAMETER if ``gfn`` is invalid.
>> + * U_P2 if ``num`` is invalid.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Share the ``num`` pages starting at guest physical frame number ``gfn``
>> + with the Hypervisor. Assume page size is PAGE_SIZE bytes. Zero the
>> + pages before returning.
>> +
>> + If the address is already backed by a secure page, unmap the page and
>> + back it with an insecure page, with the help of the Hypervisor. If it
>> + is not backed by any page yet, mark the PTE as insecure and back it
>> + with an insecure page when the address is accessed. If it is already
>> + backed by an insecure page, zero the page and return.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. The Hypervisor cannot access the SVM pages since they are backed by
>> + secure pages. Hence an SVM must explicitly request Ultravisor for
>> + pages it can share with Hypervisor.
>> +
>> + #. Shared pages are needed to support virtio and Virtual Processor Area
>> + (VPA) in SVMs.
>> +
>> +
>> +UV_UNSHARE_PAGE
>> +---------------
>> +
>> + Restore a shared SVM page to its initial state.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_UNSHARE_PAGE,
>> + uint64_t gfn, /* guest page frame number */
>> + uint73 num) /* number of pages of size PAGE_SIZE*/
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_INVALID if VM is not secure.
>> + * U_PARAMETER if ``gfn`` is invalid.
>> + * U_P2 if ``num`` is invalid.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Stop sharing ``num`` pages starting at ``gfn`` with the Hypervisor.
>> + Assume that the page size is PAGE_SIZE. Zero the pages before
>> + returning.
>> +
>> + If the address is already backed by an insecure page, unmap the page
>> + and back it with a secure page. Inform the Hypervisor to release
>> + reference to its shared page. If the address is not backed by a page
>> + yet, mark the PTE as secure and back it with a secure page when that
>> + address is accessed. If it is already backed by an secure page zero
>> + the page and return.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. The SVM may decide to unshare a page from the Hypervisor.
>> +
>> +
>> +UV_UNSHARE_ALL_PAGES
>> +--------------------
>> +
>> + Unshare all pages the SVM has shared with Hypervisor.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_UNSHARE_ALL_PAGES)
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success.
>> + * U_FUNCTION if functionality is not supported.
>> + * U_INVAL if VM is not secure.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Unshare all shared pages from the Hypervisor. All unshared pages are
>> + zeroed on return. Only pages explicitly shared by the SVM with the
>> + Hypervisor (using UV_SHARE_PAGE ultracall) are unshared. Ultravisor
>> + may internally share some pages with the Hypervisor without explicit
>> + request from the SVM. These pages will not be unshared by this
>> + ultracall.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. This call is needed when ``kexec`` is used to boot a different
>> + kernel. It may also be needed during SVM reset.
>> +
>> +UV_ESM
>> +------
>> +
>> + Secure the virtual machine (*enter secure mode*).
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t ultracall(const uint64_t UV_ESM,
>> + uint64_t esm_blob_addr, /* location of the ESM blob */
>> + unint64_t fdt) /* Flattened device tree */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * U_SUCCESS on success (including if VM is already secure).
>> + * U_FUNCTION if functionality is not supported.
>> + * U_INVALID if VM is not secure.
>> + * U_PARAMETER if ``esm_blob_addr`` is invalid.
>> + * U_P2 if ``fdt`` is invalid.
>> + * U_PERMISSION if any integrity checks fail.
>> + * U_RETRY insufficient memory to create SVM.
>> + * U_NO_KEY symmetric key unavailable.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Secure the virtual machine. On successful completion, return
>> + control to the virtual machine at the address specified in the
>> + ESM blob.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. A normal virtual machine can choose to switch to a secure mode.
>> +
>> +Hypervisor Calls API
>> +####################
>> +
>> + This document describes the Hypervisor calls (hypercalls) that are
>> + needed to support the Ultravisor. Hypercalls are services provided by
>> + the Hypervisor to virtual machines and Ultravisor.
>> +
>> + Register usage for these hypercalls is identical to that of the other
>> + hypercalls defined in the Power Architecture Platform Reference (PAPR)
>> + document. i.e on input, register R3 identifies the specific service
>> + that is being requested and registers R4 through R11 contain
>> + additional parameters to the hypercall, if any. On output, register
>> + R3 contains the return value and registers R4 through R9 contain any
>> + other output values from the hypercall.
>> +
>> + This document only covers hypercalls currently implemented/planned
>> + for Ultravisor usage but others can be added here when it makes sense.
>> +
>> + The full specification for all hypercalls/ultracalls will eventually
>> + be made available in the public/OpenPower version of the PAPR
>> + specification.
>> +
>> +Hypervisor calls to support Ultravisor
>> +======================================
>> +
>> + Following are the set of hypercalls needed to support Ultravisor.
>> +
>> +H_SVM_INIT_START
>> +----------------
>> +
>> + Begin the process of converting a normal virtual machine into an SVM.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t hypercall(const uint64_t H_SVM_INIT_START)
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * H_SUCCESS on success.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Initiate the process of securing a virtual machine. This involves
>> + coordinating with the Ultravisor, using ultracalls, to allocate
>> + resources in the Ultravisor for the new SVM, transferring the VM's
>> + pages from normal to secure memory etc. When the process is
>> + completed, Ultravisor issues the H_SVM_INIT_DONE hypercall.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. Ultravisor uses this hypercall to inform Hypervisor that a VM
>> + has initiated the process of switching to secure mode.
>> +
>> +
>> +H_SVM_INIT_DONE
>> +---------------
>> +
>> + Complete the process of securing an SVM.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t hypercall(const uint64_t H_SVM_INIT_DONE)
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * H_SUCCESS on success.
>> + * H_UNSUPPORTED if called from the wrong context (e.g.
>> + from an SVM or before an H_SVM_INIT_START
>> + hypercall).
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Complete the process of securing a virtual machine. This call must
>> + be made after a prior call to ``H_SVM_INIT_START`` hypercall.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + On successfully securing a virtual machine, the Ultravisor informs
>> + Hypervisor about it. Hypervisor can use this call to finish setting
>> + up its internal state for this virtual machine.
>> +
>> +
>> +H_SVM_PAGE_IN
>> +-------------
>> +
>> + Move the contents of a page from normal memory to secure memory.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t hypercall(const uint64_t H_SVM_PAGE_IN,
>> + uint64_t guest_pa, /* guest-physical-address */
>> + uint64_t flags, /* flags */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * H_SUCCESS on success.
>> + * H_PARAMETER if ``guest_pa`` is invalid.
>> + * H_P2 if ``flags`` is invalid.
>> + * H_P3 if ``order`` of page is invalid.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Retrieve the content of the page, belonging to the VM at the specified
>> + guest physical address.
>> +
>> + Only valid value(s) in ``flags`` are:
>> +
>> + * H_PAGE_IN_SHARED which indicates that the page is to be shared
>> + with the Ultravisor.
>> +
>> + * H_PAGE_IN_NONSHARED indicates that the UV is not anymore
>> + interested in the page. Applicable if the page is a shared page.
>> +
>> + The ``order`` parameter must correspond to the configured page size.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. When a normal VM becomes a secure VM (using the UV_ESM ultracall),
>> + the Ultravisor uses this hypercall to move contents of each page of
>> + the VM from normal memory to secure memory.
>> +
>> + #. Ultravisor uses this hypercall to ask Hypervisor to provide a page
>> + in normal memory that can be shared between the SVM and Hypervisor.
>> +
>> + #. Ultravisor uses this hypercall to page-in a paged-out page. This
>> + can happen when the SVM touches a paged-out page.
>> +
>> + #. If SVM wants to disable sharing of pages with Hypervisor, it can
>> + inform Ultravisor to do so. Ultravisor will then use this hypercall
>> + and inform Hypervisor that it has released access to the normal
>> + page.
>> +
>> +H_SVM_PAGE_OUT
>> +---------------
>> +
>> + Move the contents of the page to normal memory.
>> +
>> +Syntax
>> +~~~~~~
>> +
>> +.. code-block:: c
>> +
>> + uint64_t hypercall(const uint64_t H_SVM_PAGE_OUT,
>> + uint64_t guest_pa, /* guest-physical-address */
>> + uint64_t flags, /* flags (currently none) */
>> + uint64_t order) /* page size order */
>> +
>> +Return values
>> +~~~~~~~~~~~~~
>> +
>> + One of the following values:
>> +
>> + * H_SUCCESS on success.
>> + * H_PARAMETER if ``guest_pa`` is invalid.
>> + * H_P2 if ``flags`` is invalid.
>> + * H_P3 if ``order`` is invalid.
>> +
>> +Description
>> +~~~~~~~~~~~
>> +
>> + Move the contents of the page identified by ``guest_pa`` to normal
>> + memory.
>> +
>> + Currently ``flags`` is unused and must be set to 0. The ``order``
>> + parameter must correspond to the configured page size.
>> +
>> +Use cases
>> +~~~~~~~~~
>> +
>> + #. If Ultravisor is running low on secure pages, it can move the
>> + contents of some secure pages, into normal pages using this
>> + hypercall. The content will be encrypted.
>> +
>> +References
>> +##########
>> +
>> +.. [1] `Supporting Protected Computing on IBM Power Architecture <https://developer.ibm.com/articles/l-support-protected-computing/>`_
>> --
>> 2.20.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler
2019-08-14 10:46 ` Michael Ellerman
2019-08-14 18:34 ` Segher Boessenkool
@ 2019-08-22 1:24 ` Claudio Carvalho
1 sibling, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-22 1:24 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, kvm-ppc,
Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu, Guerney Hunt,
Thiago Bauermann
On 8/14/19 7:46 AM, Michael Ellerman wrote:
> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
>> diff --git a/arch/powerpc/kernel/ucall.S b/arch/powerpc/kernel/ucall.S
>> new file mode 100644
>> index 000000000000..de9133e45d21
>> --- /dev/null
>> +++ b/arch/powerpc/kernel/ucall.S
>> @@ -0,0 +1,20 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * Generic code to perform an ultravisor call.
>> + *
>> + * Copyright 2019, IBM Corporation.
>> + *
>> + */
>> +#include <asm/ppc_asm.h>
>> +#include <asm/export.h>
>> +
>> +_GLOBAL(ucall_norets)
>> +EXPORT_SYMBOL_GPL(ucall_norets)
>> + mfcr r0
>> + stw r0,8(r1)
>> +
>> + sc 2 /* Invoke the ultravisor */
>> +
>> + lwz r0,8(r1)
>> + mtcrf 0xff,r0
>> + blr /* Return r3 = status */
> Paulus points that we shouldn't need to save CR here. Our caller will
> have already saved it if it needed to, and we don't use CR in this
> function so we don't need to save it.
Dropped the CR save/restore in the next patchset version:
_GLOBAL(ucall_norets)
EXPORT_SYMBOL_GPL(ucall_norets)
sc 2 /* Invoke the ultravisor */
blr /* Return r3 = status */
Thanks,
Claudio
>
> That's assuming the Ultravisor follows the hcall ABI in which CR2-4 are
> non-volatile (PAPR § 14.5.3).
>
> I know plpar_hcall_norets() does save CR, but it shouldn't need to, that
> seems to be historical. aka. no one knows why it does it but it always
> has.
>
> cheers
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler
2019-08-14 18:34 ` Segher Boessenkool
@ 2019-08-22 1:26 ` Claudio Carvalho
0 siblings, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-22 1:26 UTC (permalink / raw)
To: Segher Boessenkool, Michael Ellerman
Cc: Madhavan Srinivasan, Michael Anderson, Ram Pai, kvm-ppc,
Bharata B Rao, linuxppc-dev, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
On 8/14/19 3:34 PM, Segher Boessenkool wrote:
> On Wed, Aug 14, 2019 at 08:46:15PM +1000, Michael Ellerman wrote:
>> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
>>> +_GLOBAL(ucall_norets)
>>> +EXPORT_SYMBOL_GPL(ucall_norets)
>>> + mfcr r0
>>> + stw r0,8(r1)
>>> +
>>> + sc 2 /* Invoke the ultravisor */
>>> +
>>> + lwz r0,8(r1)
>>> + mtcrf 0xff,r0
>>> + blr /* Return r3 = status */
>> Paulus points that we shouldn't need to save CR here. Our caller will
>> have already saved it if it needed to, and we don't use CR in this
>> function so we don't need to save it.
>>
>> That's assuming the Ultravisor follows the hcall ABI in which CR2-4 are
>> non-volatile (PAPR § 14.5.3).
> And assuming the ultravisor already clears (or sets, or whatever) all CR
> fields it does not want to leak the contents of (which it also should,
> of course).
Thanks Segher. We are working on that in the ultravisor source code.
Claudio.
>
>> I know plpar_hcall_norets() does save CR, but it shouldn't need to, that
>> seems to be historical. aka. no one knows why it does it but it always
>> has.
>
> Segher
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE
2019-08-14 11:33 ` Michael Ellerman
2019-08-21 0:04 ` Sukadev Bhattiprolu
@ 2019-08-22 1:33 ` Claudio Carvalho
1 sibling, 0 replies; 20+ messages in thread
From: Claudio Carvalho @ 2019-08-22 1:33 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev
Cc: Ryan Grimm, Madhavan Srinivasan, Michael Anderson, Ram Pai,
kvm-ppc, Bharata B Rao, Ryan Grimm, Sukadev Bhattiprolu,
Guerney Hunt, Thiago Bauermann
On 8/14/19 8:33 AM, Michael Ellerman wrote:
> Hi Claudio,
>
> Claudio Carvalho <cclaudio@linux.ibm.com> writes:
>> From: Michael Anderson <andmike@linux.ibm.com>
>>
>> In ultravisor enabled systems, the ultravisor creates and maintains the
>> partition table in secure memory where the hypervisor cannot access, and
> ^
> which?
>
>> therefore, the hypervisor have to do the UV_WRITE_PATE ucall whenever it
> ^ ^
> has a
>> wants to set a partition table entry (PATE).
>>
>> This patch adds the UV_WRITE_PATE ucall and uses it to set a PATE if
>> ultravisor is enabled. Additionally, this also also keeps a copy of the
>> partition table because the nestMMU does not have access to secure
>> memory. Such copy has entries for nonsecure and hypervisor partition.
> I'm having trouble parsing the last sentence there.
>
> Or at least it doesn't seem to match the code, or I don't understand
> either the code or the comment. More below.
>
>> diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c
>> index 85bc81abd286..033731f5dbaa 100644
>> --- a/arch/powerpc/mm/book3s64/pgtable.c
>> +++ b/arch/powerpc/mm/book3s64/pgtable.c
>> @@ -213,34 +223,50 @@ void __init mmu_partition_table_init(void)
>> powernv_set_nmmu_ptcr(ptcr);
>> }
>>
>> -void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
>> - unsigned long dw1)
>> +/*
>> + * Global flush of TLBs and partition table caches for this lpid. The type of
>> + * flush (hash or radix) depends on what the previous use of this partition ID
>> + * was, not the new use.
>> + */
>> +static void flush_partition(unsigned int lpid, unsigned long old_patb0)
> A nicer API would be for the 2nd param to be a "bool radix", and have
> the caller worry about the fact that it comes from (patb0 & PATB_HR).
Yes, I agree. I applied that to next patchset version.
>
>> {
>> - unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
>> -
>> - partition_tb[lpid].patb0 = cpu_to_be64(dw0);
>> - partition_tb[lpid].patb1 = cpu_to_be64(dw1);
>> -
>> - /*
>> - * Global flush of TLBs and partition table caches for this lpid.
>> - * The type of flush (hash or radix) depends on what the previous
>> - * use of this partition ID was, not the new use.
>> - */
>> asm volatile("ptesync" : : : "memory");
>> - if (old & PATB_HR) {
>> - asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
>> + if (old_patb0 & PATB_HR) {
>> + asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 1) : :
>> "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
>> - asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
>> + asm volatile(PPC_TLBIE_5(%0, %1, 2, 1, 1) : :
> That looks like an unrelated whitespace change.
>
>> "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
>> trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
>> } else {
>> - asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
>> + asm volatile(PPC_TLBIE_5(%0, %1, 2, 0, 0) : :
> Ditto.
True. I dropped the two changes above in the next patchset version.
Thanks,
Claudio
>
>> "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
>> trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
>> }
>> /* do we need fixup here ?*/
>> asm volatile("eieio; tlbsync; ptesync" : : : "memory");
>> }
>> +
>> +void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
>> + unsigned long dw1)
>> +{
>> + unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
>> +
>> + partition_tb[lpid].patb0 = cpu_to_be64(dw0);
>> + partition_tb[lpid].patb1 = cpu_to_be64(dw1);
> ie. here we always update the copy of the partition table, regardless of
> whether we're running under an ultravisor or not. So the copy is a
> complete copy isn't it?
>
>> + /*
>> + * In ultravisor enabled systems, the ultravisor maintains the partition
>> + * table in secure memory where we don't have access, therefore, we have
>> + * to do a ucall to set an entry.
>> + */
>> + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) {
>> + uv_register_pate(lpid, dw0, dw1);
>> + pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",
>> + dw0, dw1);
>> + } else {
>> + flush_partition(lpid, old);
>> + }
> What is different is whether we flush or not.
>
> And don't we still need to do the flush for the nestMMU? I assume we're
> saying the ultravisor will broadcast a flush for us, which will also
> handle the nestMMU case?
>
> cheers
>
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2019-08-22 1:35 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-08 4:05 [PATCH v5 0/7] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 1/7] Documentation/powerpc: Ultravisor API Claudio Carvalho
2019-08-09 12:45 ` Michael Ellerman
2019-08-21 22:30 ` Claudio Carvalho
2019-08-12 15:58 ` Fabiano Rosas
2019-08-21 22:01 ` Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 2/7] powerpc/kernel: Add ucall_norets() ultravisor call handler Claudio Carvalho
2019-08-14 10:46 ` Michael Ellerman
2019-08-14 18:34 ` Segher Boessenkool
2019-08-22 1:26 ` Claudio Carvalho
2019-08-22 1:24 ` Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 3/7] powerpc/powernv: Introduce FW_FEATURE_ULTRAVISOR Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 4/7] powerpc/mm: Use UV_WRITE_PATE ucall to register a PATE Claudio Carvalho
2019-08-14 11:33 ` Michael Ellerman
2019-08-21 0:04 ` Sukadev Bhattiprolu
2019-08-22 1:33 ` Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 5/7] powerpc/mm: Write to PTCR only if ultravisor disabled Claudio Carvalho
2019-08-14 12:04 ` Michael Ellerman
2019-08-08 4:05 ` [PATCH v5 6/7] powerpc/powernv: Access LDBAR " Claudio Carvalho
2019-08-08 4:05 ` [PATCH v5 7/7] powerpc/kvm: Use UV_RETURN ucall to return to ultravisor Claudio Carvalho
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