From: Michael Ellerman <mpe@ellerman.id.au>
To: Reza Arbab <arbab@linux.ibm.com>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
Charles Johns <crjohns@us.ibm.com>,
linuxppc-dev@lists.ozlabs.org, Paul Mackerras <paulus@samba.org>
Subject: Re: [PATCH] powerpc/mm: Add _PAGE_SAO to _PAGE_CACHE_CTL mask
Date: Thu, 31 Jan 2019 00:35:27 +1100 [thread overview]
Message-ID: <87fttap8tc.fsf@concordia.ellerman.id.au> (raw)
In-Reply-To: <20190129170347.igcb4yufilshjgri@arbab-laptop.localdomain>
Reza Arbab <arbab@linux.ibm.com> writes:
> On Tue, Jan 29, 2019 at 08:37:28PM +0530, Aneesh Kumar K.V wrote:
>>Not sure what the fix is about. We set the related hash pte flags via
>>
>> if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_TOLERANT)
>> rflags |= HPTE_R_I;
>> else if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT)
>> rflags |= (HPTE_R_I | HPTE_R_G);
>> else if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_SAO)
>> rflags |= (HPTE_R_W | HPTE_R_I | HPTE_R_M);
>
> Again, nothing broken here, just a code readability thing. As Alexey
> (and Charlie) noted, given the above it is a little confusing to define
> _PAGE_CACHE_CTL this way:
>
> #define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
Yeah that's confusing I agree.
It's not really a maintainability thing, because those bits are in the
architecture, so they can't change.
> I like Alexey's idea, maybe just use a literal?
>
> #define _PAGE_CACHE_CTL 0x30
I prefer your original patch. It serves as documentation on what values
we expect to see in that field.
cheers
next prev parent reply other threads:[~2019-01-30 13:37 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 17:31 [PATCH] powerpc/mm: Add _PAGE_SAO to _PAGE_CACHE_CTL mask Reza Arbab
2019-01-29 1:39 ` Alexey Kardashevskiy
2019-01-29 15:07 ` Aneesh Kumar K.V
2019-01-29 17:03 ` Reza Arbab
2019-01-30 13:35 ` Michael Ellerman [this message]
2019-02-01 5:02 ` Alexey Kardashevskiy
2019-02-08 13:02 ` Michael Ellerman
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