From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22c.google.com (mail-io0-x22c.google.com [IPv6:2607:f8b0:4001:c06::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id D73591A1DB2 for ; Thu, 13 Aug 2015 02:01:04 +1000 (AEST) Received: by iodt126 with SMTP id t126so24476338iod.2 for ; Wed, 12 Aug 2015 09:01:02 -0700 (PDT) MIME-Version: 1.0 Sender: linus971@gmail.com In-Reply-To: <1439363150-8661-30-git-send-email-hch@lst.de> References: <1439363150-8661-1-git-send-email-hch@lst.de> <1439363150-8661-30-git-send-email-hch@lst.de> Date: Wed, 12 Aug 2015 09:01:02 -0700 Message-ID: Subject: Re: [PATCH 29/31] parisc: handle page-less SG entries From: Linus Torvalds To: Christoph Hellwig Cc: Jens Axboe , Dan Williams , Vineet Gupta , =?UTF-8?Q?H=C3=A5vard_Skinnemoen?= , Hans-Christian Egtvedt , Miao Steven , David Howells , Michal Simek , "the arch/x86 maintainers" , David Woodhouse , Alex Williamson , grundler@parisc-linux.org, Linux Kernel Mailing List , "linux-arch@vger.kernel.org" , linux-alpha@vger.kernel.org, "linux-ia64@vger.kernel.org" , linux-metag@vger.kernel.org, linux-mips , Parisc List , ppc-dev , linux-s390 , sparclinux@vger.kernel.org, linux-xtensa@linux-xtensa.org, "linux-nvdimm@lists.01.org" , Linux Media Mailing List Content-Type: text/plain; charset=UTF-8 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, Aug 12, 2015 at 12:05 AM, Christoph Hellwig wrote: > Make all cache invalidation conditional on sg_has_page() and use > sg_phys to get the physical address directly. So this worries me a bit (I'm just reacting to one random patch in the series). The reason? I think this wants a big honking comment somewhere saying "non-sg_page accesses are not necessarily cache coherent"). Now, I don't think that's _wrong_, but it's an important distinction: if you look up pages in the page tables directly, there's a very subtle difference between then saving just the pfn and saving the "struct page" of the result. On sane architectures, this whole cache flushing thing doesn't matter. Which just means that it's going to be even more subtle on the odd broken ones.. I'm assuming that anybody who wants to use the page-less scatter-gather lists always does so on memory that isn't actually virtually mapped at all, or only does so on sane architectures that are cache coherent at a physical level, but I'd like that assumption *documented* somewhere. (And maybe it is, and I just didn't get to that patch yet) Linus