From: Shengjiu Wang <shengjiu.wang@gmail.com>
To: Fabio Estevam <festevam@gmail.com>
Cc: Linux-ALSA <alsa-devel@alsa-project.org>,
"Xiubo Li" <Xiubo.Lee@gmail.com>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
"Shengjiu Wang" <shengjiu.wang@nxp.com>,
"Takashi Iwai" <tiwai@suse.com>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Jaroslav Kysela" <perex@perex.cz>,
"Nicolin Chen" <nicoleotsuka@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Hans Söderlund" <hans.soderlund@realbit.se>,
"Andreas Henriksson" <andreas@fatal.se>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ASoC: fsl_sai: Enable MCTL_MCLK_EN bit for master mode
Date: Thu, 6 Jul 2023 19:19:28 +0800 [thread overview]
Message-ID: <CAA+D8ANAg7bs0A35c7Af3_-5sLaqvT1RoKfCbzYi=z=t_q9LUw@mail.gmail.com> (raw)
In-Reply-To: <CAOMZO5CCdaodWQrHUQgMizoES=jfEtw-sNJZG-DJMpRD8tZW9g@mail.gmail.com>
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On Thu, Jul 6, 2023 at 7:08 PM Fabio Estevam <festevam@gmail.com> wrote:
> Hi Andreas,
>
> On Thu, Jul 6, 2023 at 5:47 AM Andreas Henriksson <andreas@fatal.se>
> wrote:
>
> > We've been working on an i.MX8MP where MCLK needs to be input and found
> > that this enables the MCLK as output despite not having set the
> > `fsl,sai-mclk-direction-output;` devicetree property in our DT.
> > Reverting the patch fixes the issues for us.
> >
> > I have to say that the code comment made me a bit confused, but once
> > I found the commit message I understood why this code existed.
> > If this is really i.MX8MM specific maybe mention that in the code
> > comment and please make the code actually only trigger on i.MX8MM.
> > It seems to me like these all fulfill the current criteria:
> > imx7ulp, imx8mq, imx8mm, imx8mp, imx8ulp, imx93
> >
> > Should I report this in bugzilla.kernel.org ?
>
> Should we do a fix like this?
>
> --- a/sound/soc/fsl/fsl_sai.c
> +++ b/sound/soc/fsl/fsl_sai.c
> @@ -1453,7 +1453,7 @@ static int fsl_sai_probe(struct platform_device
> *pdev)
>
> /* Select MCLK direction */
> if (sai->mclk_direction_output &&
> - sai->soc_data->max_register >= FSL_SAI_MCTL) {
> + sai->soc_data->max_register >= FSL_SAI_MCTL &&
> sai->mclk_direction_output) {
> regmap_update_bits(sai->regmap, FSL_SAI_MCTL,
> FSL_SAI_MCTL_MCLK_EN,
> FSL_SAI_MCTL_MCLK_EN);
> }
>
No, this is the code in probe().
The code with the issue is in fsl_sai_set_bclk().
The clean way for fixing is to remove the code in fsl_sai_set_bclk()
and add "fsl,sai-mclk-direction-output;" property in dts for some
node.
best regards
wang shengjiu
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next prev parent reply other threads:[~2023-07-06 13:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-19 12:36 [PATCH] ASoC: fsl_sai: Enable MCTL_MCLK_EN bit for master mode Shengjiu Wang
2022-05-19 13:23 ` Fabio Estevam
2022-05-19 13:41 ` Shengjiu Wang
2023-07-06 8:47 ` Andreas Henriksson
2023-07-06 11:06 ` Shengjiu Wang
2023-07-06 11:08 ` Fabio Estevam
2023-07-06 11:19 ` Shengjiu Wang [this message]
2023-07-06 11:32 ` Fabio Estevam
2023-07-06 12:34 ` Andreas Henriksson
2023-07-06 13:22 ` Fabio Estevam
2023-07-06 22:00 ` Fabio Estevam
2022-06-08 20:46 ` Mark Brown
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