From: Michael Neuling <mikey@neuling.org>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: Anton Blanchard <anton@samba.org>,
wei.guo.simon@gmail.com,
Carlos Eduardo Seo <cseo@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au,
Cyril Bur <cyrilbur@gmail.com>
Subject: Re: [PATCH 0/2] Enable MSR_TM lazily
Date: Wed, 14 Sep 2016 22:17:04 +1000 [thread overview]
Message-ID: <CAEjGV6wLp6-YyV2iD8FFAjrH+57xZxjUECA2WGu=jt8xa22EuA@mail.gmail.com> (raw)
In-Reply-To: <20160914221222.57e84324@roar.ozlabs.ibm.com>
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On 14 Sep. 2016 10:12 pm, "Nicholas Piggin" <npiggin@gmail.com> wrote:
>
> On Wed, 14 Sep 2016 21:46:39 +1000
> Michael Neuling <mikey@neuling.org> wrote:
>
> > On Wed, 2016-09-14 at 21:28 +1000, Nicholas Piggin wrote:
> > > Cc'ing Carlos
> > >
> > > On Wed, 14 Sep 2016 18:02:14 +1000
> > I think we might be able to detect this case in the kernel. If it's a
tabort
> > that's trapped on, we can't have been transactional. Hence we can
safely PC+=4
> > and leave off TM off.
> >
> > It would cost us a get_user(inst, regs->nip); but it might be worth it
for this
> > special but common case.
>
> That would take an extra trap for every syscall, I think.
You're right. That wouldn't work.
Mikey
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next prev parent reply other threads:[~2016-09-14 12:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-14 8:02 [PATCH 0/2] Enable MSR_TM lazily Cyril Bur
2016-09-14 8:02 ` [PATCH 1/2] powerpc: tm: Add TM Unavailable Exception Cyril Bur
2016-10-05 2:36 ` [1/2] " Michael Ellerman
2016-09-14 8:02 ` [PATCH 2/2] powerpc: tm: Enable transactional memory (TM) lazily for userspace Cyril Bur
2016-09-19 4:47 ` Simon Guo
2016-09-19 5:26 ` Cyril Bur
2016-09-14 11:28 ` [PATCH 0/2] Enable MSR_TM lazily Nicholas Piggin
2016-09-14 11:46 ` Michael Neuling
2016-09-14 12:12 ` Nicholas Piggin
2016-09-14 12:17 ` Michael Neuling [this message]
2016-09-14 14:10 ` Carlos Eduardo Seo
2016-09-15 3:59 ` Nicholas Piggin
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