From: Bjorn Helgaas <bhelgaas@google.com>
To: Yinghai Lu <yinghai@kernel.org>
Cc: linux-arch@vger.kernel.org, Tony Luck <tony.luck@intel.com>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Dominik Brodowski <linux@dominikbrodowski.net>,
Paul Mackerras <paulus@samba.org>,
Jesse Barnes <jbarnes@virtuousgeek.org>,
linux-pci@vger.kernel.org,
Andrew Morton <akpm@linux-foundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH 09/24] PCI, powerpc: Register busn_res for root buses
Date: Wed, 8 Feb 2012 07:58:21 -0800 [thread overview]
Message-ID: <CAErSpo6BwznWf3rq4J2Ao+rrgR4yWqQ0mQGygkd2KmBuA1OD8g@mail.gmail.com> (raw)
In-Reply-To: <1328425088-6562-10-git-send-email-yinghai@kernel.org>
On Sat, Feb 4, 2012 at 10:57 PM, Yinghai Lu <yinghai@kernel.org> wrote:
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> ---
> =A0arch/powerpc/kernel/pci-common.c | =A0 =A07 ++++++-
> =A01 files changed, 6 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-c=
ommon.c
> index cce98d7..501f29b 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -1732,6 +1732,8 @@ void __devinit pcibios_scan_phb(struct pci_controll=
er *hose)
> =A0 =A0 =A0 =A0bus->secondary =3D hose->first_busno;
> =A0 =A0 =A0 =A0hose->bus =3D bus;
>
> + =A0 =A0 =A0 pci_bus_insert_busn_res(bus, hose->first_busno, hose->last_=
busno);
> +
> =A0 =A0 =A0 =A0/* Get probe mode and perform scan */
> =A0 =A0 =A0 =A0mode =3D PCI_PROBE_NORMAL;
> =A0 =A0 =A0 =A0if (node && ppc_md.pci_probe_mode)
> @@ -1742,8 +1744,11 @@ void __devinit pcibios_scan_phb(struct pci_control=
ler *hose)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0of_scan_bus(node, bus);
> =A0 =A0 =A0 =A0}
>
> - =A0 =A0 =A0 if (mode =3D=3D PCI_PROBE_NORMAL)
> + =A0 =A0 =A0 if (mode =3D=3D PCI_PROBE_NORMAL) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 pci_bus_update_busn_res_end(bus, 255);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0hose->last_busno =3D bus->subordinate =3D =
pci_scan_child_bus(bus);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 pci_bus_update_busn_res_end(bus, bus->subor=
dinate);
> + =A0 =A0 =A0 }
The only architecture-specific thing here is discovering the range of
bus numbers below a host bridge. The architecture should not have to
mess around with pci_bus_update_busn_res_end() like this. It should
be able to say "here's my bus number range" (and of course the PCI
core can default to 0-255 if the arch doesn't supply a range) and the
core should take care of the rest.
Bjorn
next prev parent reply other threads:[~2012-02-08 15:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1328425088-6562-1-git-send-email-yinghai@kernel.org>
2012-02-05 6:57 ` [PATCH 09/24] PCI, powerpc: Register busn_res for root buses Yinghai Lu
2012-02-08 15:58 ` Bjorn Helgaas [this message]
2012-02-08 17:31 ` Yinghai Lu
2012-02-08 22:02 ` Benjamin Herrenschmidt
2012-02-09 19:24 ` Bjorn Helgaas
2012-02-09 21:35 ` Benjamin Herrenschmidt
2012-02-23 20:25 ` Jesse Barnes
2012-02-23 20:51 ` Bjorn Helgaas
2012-02-24 22:24 ` Jesse Barnes
2012-02-25 7:47 ` Yinghai Lu
2012-02-27 22:44 ` Bjorn Helgaas
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