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From: Balbir Singh <bsingharora@gmail.com>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: "open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)"
	<linuxppc-dev@lists.ozlabs.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	"Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>
Subject: Re: [PATCH v1 1/3] arch/powerpc/set_memory: Implement set_memory_xx routines
Date: Wed, 2 Aug 2017 20:33:04 +1000	[thread overview]
Message-ID: <CAKTCnzkqN3j-cjuQrWHMe_4P1omCyyuFHA7yKFUZ_JUFSspmDA@mail.gmail.com> (raw)
In-Reply-To: <87pocez3f8.fsf@linux.vnet.ibm.com>

On Wed, Aug 2, 2017 at 8:09 PM, Aneesh Kumar K.V
<aneesh.kumar@linux.vnet.ibm.com> wrote:
> Balbir Singh <bsingharora@gmail.com> writes:
>
>> Add support for set_memory_xx routines. With the STRICT_KERNEL_RWX
>> feature support we got support for changing the page permissions
>> for pte ranges. This patch adds support for both radix and hash
>> so that we can change their permissions via set/clear masks.
>>
>> A new helper is required for hash (hash__change_memory_range()
>> is changed to hash__change_boot_memory_range() as it deals with
>> bolted PTE's).
>>
>> hash__change_memory_range() works with vmalloc'ed PAGE_SIZE requests
>> for permission changes. hash__change_memory_range() does not invoke
>> updatepp, instead it changes the software PTE and invalidates the PTE.
>>
>> For radix, radix__change_memory_range() is setup to do the right
>> thing for vmalloc'd addresses. It takes a new parameter to decide
>> what attributes to set.
>>
> ....
>
>> +int hash__change_memory_range(unsigned long start, unsigned long end,
>> +                             unsigned long set, unsigned long clear)
>> +{
>> +     unsigned long idx;
>> +     pgd_t *pgdp;
>> +     pud_t *pudp;
>> +     pmd_t *pmdp;
>> +     pte_t *ptep;
>> +
>> +     start = ALIGN_DOWN(start, PAGE_SIZE);
>> +     end = PAGE_ALIGN(end); // aligns up
>> +
>> +     /*
>> +      * Update the software PTE and flush the entry.
>> +      * This should cause a new fault with the right
>> +      * things setup in the hash page table
>> +      */
>> +     pr_debug("Changing flags on range %lx-%lx setting 0x%lx removing 0x%lx\n",
>> +              start, end, set, clear);
>> +
>> +     for (idx = start; idx < end; idx += PAGE_SIZE) {
>
>
>> +             pgdp = pgd_offset_k(idx);
>> +             pudp = pud_alloc(&init_mm, pgdp, idx);
>> +             if (!pudp)
>> +                     return -1;
>> +             pmdp = pmd_alloc(&init_mm, pudp, idx);
>> +             if (!pmdp)
>> +                     return -1;
>> +             ptep = pte_alloc_kernel(pmdp, idx);
>> +             if (!ptep)
>> +                     return -1;
>> +             hash__pte_update(&init_mm, idx, ptep, clear, set, 0);

I think this does the needful, if H_PAGE_HASHPTE is set, the flush
will happen

>> +             hash__flush_tlb_kernel_range(idx, idx + PAGE_SIZE);
>> +     }
>
> You can use find_linux_pte_or_hugepte. with my recent patch series
> find_init_mm_pte() ?
>

for pte_mkwrite and pte_wrprotect?

Balbir Singh.

  reply	other threads:[~2017-08-02 10:33 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-01 11:25 [PATCH v1 0/3] Implement set_memory_xx for ppc64 book3s Balbir Singh
2017-08-01 11:25 ` [PATCH v1 1/3] arch/powerpc/set_memory: Implement set_memory_xx routines Balbir Singh
2017-08-01 19:08   ` christophe leroy
2017-08-02  3:07     ` Balbir Singh
2017-08-02 10:09   ` Aneesh Kumar K.V
2017-08-02 10:33     ` Balbir Singh [this message]
2017-08-04  3:38       ` Aneesh Kumar K.V
2017-08-04  3:53         ` Balbir Singh
2017-08-01 11:25 ` [PATCH v1 2/3] Enable ARCH_HAS_SET_MEMORY Balbir Singh
2017-08-01 11:25 ` [PATCH v1 3/3] arch/powerpc/net/bpf: Basic EBPF support Balbir Singh
2017-08-02 14:22   ` Naveen N. Rao

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