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* [PATCH] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode
@ 2019-02-15 11:04 S.j. Wang
  2019-02-15 18:55 ` Nicolin Chen
  2019-02-16 13:19 ` Fabio Estevam
  0 siblings, 2 replies; 3+ messages in thread
From: S.j. Wang @ 2019-02-15 11:04 UTC (permalink / raw)
  To: timur, nicoleotsuka, Xiubo.Lee, festevam; +Cc: alsa-devel, linuxppc-dev

The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit, driver set it to
wrong register, correct it.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
 sound/soc/fsl/fsl_esai.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
index 57b484768a58..afe67c865330 100644
--- a/sound/soc/fsl/fsl_esai.c
+++ b/sound/soc/fsl/fsl_esai.c
@@ -398,7 +398,8 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 		break;
 	case SND_SOC_DAIFMT_RIGHT_J:
 		/* Data on rising edge of bclk, frame high, right aligned */
-		xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA;
+		xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP;
+		xcr  |= ESAI_xCR_xWA;
 		break;
 	case SND_SOC_DAIFMT_DSP_A:
 		/* Data on rising edge of bclk, frame high, 1clk before data */
@@ -455,12 +456,12 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 		return -EINVAL;
 	}
 
-	mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR;
+	mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR | ESAI_xCR_xWA;
 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr);
 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr);
 
 	mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP |
-		ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA;
+		ESAI_xCCR_xFSD | ESAI_xCCR_xCKD;
 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr);
 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);
 
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode
  2019-02-15 11:04 [PATCH] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode S.j. Wang
@ 2019-02-15 18:55 ` Nicolin Chen
  2019-02-16 13:19 ` Fabio Estevam
  1 sibling, 0 replies; 3+ messages in thread
From: Nicolin Chen @ 2019-02-15 18:55 UTC (permalink / raw)
  To: S.j. Wang; +Cc: linuxppc-dev, alsa-devel, festevam, timur, Xiubo.Lee

On Fri, Feb 15, 2019 at 11:04:38AM +0000, S.j. Wang wrote:
> The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit, driver set it to
> wrong register, correct it.
> 
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>

Would need this for stable kernel too.

Ackedy-by: Nicolin Chen <nicoleotsuka@gmail.com>

Thanks.

> ---
>  sound/soc/fsl/fsl_esai.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
> index 57b484768a58..afe67c865330 100644
> --- a/sound/soc/fsl/fsl_esai.c
> +++ b/sound/soc/fsl/fsl_esai.c
> @@ -398,7 +398,8 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>  		break;
>  	case SND_SOC_DAIFMT_RIGHT_J:
>  		/* Data on rising edge of bclk, frame high, right aligned */
> -		xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA;
> +		xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP;
> +		xcr  |= ESAI_xCR_xWA;
>  		break;
>  	case SND_SOC_DAIFMT_DSP_A:
>  		/* Data on rising edge of bclk, frame high, 1clk before data */
> @@ -455,12 +456,12 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>  		return -EINVAL;
>  	}
>  
> -	mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR;
> +	mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR | ESAI_xCR_xWA;
>  	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr);
>  	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr);
>  
>  	mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP |
> -		ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA;
> +		ESAI_xCCR_xFSD | ESAI_xCCR_xCKD;
>  	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr);
>  	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);
>  
> -- 
> 1.9.1
> 

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [PATCH] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode
  2019-02-15 11:04 [PATCH] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode S.j. Wang
  2019-02-15 18:55 ` Nicolin Chen
@ 2019-02-16 13:19 ` Fabio Estevam
  1 sibling, 0 replies; 3+ messages in thread
From: Fabio Estevam @ 2019-02-16 13:19 UTC (permalink / raw)
  To: S.j. Wang; +Cc: nicoleotsuka, alsa-devel, linuxppc-dev, timur, Xiubo.Lee

Hi Shengjiu,

On Fri, Feb 15, 2019 at 9:04 AM S.j. Wang <shengjiu.wang@nxp.com> wrote:
>
> The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit, driver set it to
> wrong register, correct it.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>

Reviewed-by: Fabio Estevam <festevam@gmail.com>

Please add a Fixes tag and Cc stable.

Also, it seems that Mark Brown is not on Cc. Please Cc him in v2.

Thanks

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-02-16 13:21 UTC | newest]

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2019-02-15 11:04 [PATCH] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode S.j. Wang
2019-02-15 18:55 ` Nicolin Chen
2019-02-16 13:19 ` Fabio Estevam

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