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Date: Thu, 10 Nov 2022 19:09:34 +1000
Message-Id: <CO8HYAI0B7DD.2F7V302G1EIBO@bobo>
Subject: Re: [PATCH 01/17] powerpc/qspinlock: powerpc qspinlock
 implementation
From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Jordan Niethe" <jniethe5@gmail.com>, <linuxppc-dev@lists.ozlabs.org>
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On Thu Nov 10, 2022 at 10:35 AM AEST, Jordan Niethe wrote:
> On Thu, 2022-07-28 at 16:31 +1000, Nicholas Piggin wrote:
> <snip>
> > -#define queued_spin_lock queued_spin_lock
> > =20
> > -static inline void queued_spin_unlock(struct qspinlock *lock)
> > +static __always_inline int queued_spin_trylock(struct qspinlock *lock)
> >  {
> > -	if (!IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) || !is_shared_processor())
> > -		smp_store_release(&lock->locked, 0);
> > -	else
> > -		__pv_queued_spin_unlock(lock);
> > +	if (atomic_cmpxchg_acquire(&lock->val, 0, 1) =3D=3D 0)
> > +		return 1;
> > +	return 0;
>
> optional style nit: return (atomic_cmpxchg_acquire(&lock->val, 0, 1) =3D=
=3D 0);
>
> [resend as utf-8, not utf-7]

Thanks for the thorough review, apologies again it took me so long to
get back to.

I'm not completely sold on this. I guess it's already side-effects in a
control flow statement though... Maybe I will change it, not sure.

Thanks,
Nick