RE: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420

[Leekha Shaveta-B20052 <B20052@freescale.com>]

-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org]=20
Sent: Friday, April 05, 2013 12:44 AM
To: Leekha Shaveta-B20052
Cc: Wood Scott-B07421; Zhao Chenhui-B35336; Mehresh Ramneek-B31383; Garg Va=
kul-B16394; Lian Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMI=
NG; Sethi Varun-B16395; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree=
 files for B4860 and B4420


On Apr 4, 2013, at 2:03 AM, Leekha Shaveta-B20052 wrote:

>=20
>=20
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Wednesday, April 03, 2013 10:10 PM
> To: Leekha Shaveta-B20052
> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Zhao=20
> Chenhui-B35336; Lian Minghuan-B31939; Garg Vakul-B16394; Tang=20
> Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi=20
> Varun-B16395
> Subject: Re: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device=20
> tree files for B4860 and B4420
>=20
> On 04/03/2013 01:42:14 AM, Leekha Shaveta-B20052 wrote:
>>=20
>>=20
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Wednesday, April 03, 2013 12:49 AM
>> To: Leekha Shaveta-B20052
>> Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian=20
>> Minghuan-B31939; Leekha Shaveta-B20052; Garg Vakul-B16394; Tang=20
>> Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi
>> Varun-B16395
>> Subject: Re: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon=20
>> device tree files for B4860 and B4420
>>=20
>> On 04/02/2013 02:16:05 AM, Shaveta Leekha wrote:
>>> +/ {
>>> +	compatible =3D "fsl,B4860";
>>> +
>>> +	cpus {
>>> +		cpu1: PowerPC,e6500@1 {
>>> +			device_type =3D "cpu";
>>> +			reg =3D <2 3>;
>>> +			next-level-cache =3D <&L2>;
>>> +		};
>>> +		cpu2: PowerPC,e6500@2 {
>>> +			device_type =3D "cpu";
>>> +			reg =3D <4 5>;
>>> +			next-level-cache =3D <&L2>;
>>> +		};
>>> +		cpu3: PowerPC,e6500@3 {
>>> +			device_type =3D "cpu";
>>> +			reg =3D <6 7>;
>>> +			next-level-cache =3D <&L2>;
>>> +		};
>>=20
>> The unit addresses need to match "reg".
>> [SL] You mean  "@1" should match to "reg =3D <2 3>" ?
>=20
> Yes, it should be "@2" for that node.
>=20
>> As each e6500 core in B4860 is dual- threaded, reg property here=20
>> represents the thread's identifier in that PA core.
>>=20
>> So convention used in T4 and B4 is: core 0 having threads 0 and 1,
>> 						Core 1 having <2 3> and
>> so on....
>=20
> The convention used in device trees is that the unit address matches the =
reg.
>=20
> -Scott
> [SL] Ok, I can change that. Will make unit address as @2 for <2 3>, @4 fo=
r <4 5> and so on....
>=20
> Kumar, please respond here, as I have followed the convention used in=20
> T4 device tree files for Dual-threaded cores.

Scott is correct, we probably need to fix the T4 dts.

- k
[SL] ok, will do it for B4
Regards,
Shaveta=20