From: "Alastair D'Silva" <alastair@au1.ibm.com>
To: Segher Boessenkool <segher@kernel.crashing.org>,
Christophe Leroy <christophe.leroy@c-s.fr>
Cc: David Hildenbrand <david@redhat.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, Nicholas Piggin <npiggin@gmail.com>,
Mike Rapoport <rppt@linux.vnet.ibm.com>,
Paul Mackerras <paulus@samba.org>, Qian Cai <cai@lca.pw>,
Thomas Gleixner <tglx@linutronix.de>,
linuxppc-dev@lists.ozlabs.org,
Andrew Morton <akpm@linux-foundation.org>,
Allison Randal <allison@lohutok.net>
Subject: RE: [PATCH v2 3/6] powerpc: Convert flush_icache_range & friends to C
Date: Wed, 04 Sep 2019 13:36:08 +1000 [thread overview]
Message-ID: <b9f8b21afc0f86e9757daf3de2794144ce2565e6.camel@au1.ibm.com> (raw)
In-Reply-To: <20190903160415.GA9749@gate.crashing.org>
On Tue, 2019-09-03 at 11:04 -0500, Segher Boessenkool wrote:
> On Tue, Sep 03, 2019 at 04:28:09PM +0200, Christophe Leroy wrote:
> > Le 03/09/2019 à 15:04, Segher Boessenkool a écrit :
> > > On Tue, Sep 03, 2019 at 03:23:57PM +1000, Alastair D'Silva wrote:
> > > > + asm volatile(
> > > > + " mtctr %2;"
> > > > + " mtmsr %3;"
> > > > + " isync;"
> > > > + "0: dcbst 0, %0;"
> > > > + " addi %0, %0, %4;"
> > > > + " bdnz 0b;"
> > > > + " sync;"
> > > > + " mtctr %2;"
> > > > + "1: icbi 0, %1;"
> > > > + " addi %1, %1, %4;"
> > > > + " bdnz 1b;"
> > > > + " sync;"
> > > > + " mtmsr %5;"
> > > > + " isync;"
> > > > + : "+r" (loop1), "+r" (loop2)
> > > > + : "r" (nb), "r" (msr), "i" (bytes), "r" (msr0)
> > > > + : "ctr", "memory");
> > >
> > > This outputs as one huge assembler statement, all on one
> > > line. That's
> > > going to be fun to read or debug.
> >
> > Do you mean \n has to be added after the ; ?
>
> Something like that. There is no really satisfying way for doing
> huge
> inline asm, and maybe that is a good thing ;-)
>
> Often people write \n\t at the end of each line of inline asm. This
> works
> pretty well (but then there are labels, oh joy).
>
> > > loop1 and/or loop2 can be assigned the same register as msr0 or
> > > nb. They
> > > need to be made earlyclobbers. (msr is fine, all of its reads
> > > are before
> > > any writes to loop1 or loop2; and bytes is fine, it's not a
> > > register).
> >
> > Can you explicit please ? Doesn't '+r' means that they are input
> > and
> > output at the same time ?
>
> That is what + means, yes -- that this output is an input as
> well. It is
> the same to write
>
> asm("mov %1,%0 ; mov %0,42" : "+r"(x), "=r"(y));
> or to write
> asm("mov %1,%0 ; mov %0,42" : "=r"(x), "=r"(y) : "0"(x));
>
> (So not "at the same time" as in "in the same machine instruction",
> but
> more loosely, as in "in the same inline asm statement").
>
> > "to be made earlyclobbers", what does this means exactly ? How to
> > do that ?
>
> You write &, like "+&r" in this case. It means the machine code
> writes
> to this register before it has consumed all asm inputs (remember, GCC
> does not understand (or even parse!) the assembler string).
>
> So just
>
> : "+&r" (loop1), "+&r" (loop2)
>
> will do. (Why are they separate though? It could just be one loop
> var).
>
>
Thanks, I've updated these.
--
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819
next prev parent reply other threads:[~2019-09-04 3:38 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 5:23 [PATCH v2 0/6] powerpc: convert cache asm to C Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 1/6] powerpc: Allow flush_icache_range to work across ranges >4GB Alastair D'Silva
2019-09-14 7:46 ` Christophe Leroy
2019-09-16 3:25 ` Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 2/6] powerpc: define helpers to get L1 icache sizes Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 3/6] powerpc: Convert flush_icache_range & friends to C Alastair D'Silva
2019-09-03 6:08 ` Christophe Leroy
2019-09-03 11:25 ` Michael Ellerman
2019-09-04 3:23 ` Alastair D'Silva
2019-09-04 13:35 ` Segher Boessenkool
2019-09-03 13:04 ` Segher Boessenkool
2019-09-03 14:28 ` Christophe Leroy
2019-09-03 16:04 ` Segher Boessenkool
2019-09-03 17:05 ` Christophe Leroy
2019-09-03 18:31 ` Segher Boessenkool
2019-09-03 20:11 ` Gabriel Paubert
2019-09-04 3:42 ` Alastair D'Silva
2019-09-04 3:36 ` Alastair D'Silva [this message]
2019-09-03 5:23 ` [PATCH v2 4/6] powerpc: Chunk calls to flush_dcache_range in arch_*_memory Alastair D'Silva
2019-09-03 6:19 ` Christophe Leroy
2019-09-03 6:25 ` Alastair D'Silva
2019-09-03 6:51 ` Christophe Leroy
2019-09-04 4:11 ` Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 5/6] powerpc: Remove 'extern' from func prototypes in cache headers Alastair D'Silva
2019-09-03 6:21 ` Christophe Leroy
2019-09-03 5:24 ` [PATCH v2 6/6] powerpc: Don't flush caches when adding memory Alastair D'Silva
2019-09-03 6:23 ` Christophe Leroy
2019-09-03 6:27 ` Alastair D'Silva
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