From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2CBBC32792 for ; Thu, 3 Oct 2019 20:43:00 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5C201207FF for ; Thu, 3 Oct 2019 20:43:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="OvJoiMhG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5C201207FF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46klM60bczzDqVq for ; Fri, 4 Oct 2019 06:42:58 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nvidia.com (client-ip=216.228.121.65; helo=hqemgate16.nvidia.com; envelope-from=jhubbard@nvidia.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="OvJoiMhG"; dkim-atps=neutral Received: from hqemgate16.nvidia.com (hqemgate16.nvidia.com [216.228.121.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46klJf0TcTzDqYX for ; Fri, 4 Oct 2019 06:40:49 +1000 (AEST) Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 03 Oct 2019 13:40:40 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 03 Oct 2019 13:40:40 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 03 Oct 2019 13:40:40 -0700 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 3 Oct 2019 20:40:40 +0000 Received: from [10.110.48.28] (10.124.1.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 3 Oct 2019 20:40:38 +0000 Subject: Re: [PATCH v5 01/11] asm-generic/pgtable: Adds generic functions to monitor lockless pgtable walks To: Peter Zijlstra , Leonardo Bras References: <20191003013325.2614-1-leonardo@linux.ibm.com> <20191003013325.2614-2-leonardo@linux.ibm.com> <20191003071145.GM4536@hirez.programming.kicks-ass.net> <20191003115141.GJ4581@hirez.programming.kicks-ass.net> From: John Hubbard X-Nvconfidentiality: public Message-ID: Date: Thu, 3 Oct 2019 13:40:38 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191003115141.GJ4581@hirez.programming.kicks-ass.net> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1570135241; bh=oygYxcAudWTOP6aOcR5gJi5qvCLemgS4yrH5ULKuCPM=; h=X-PGP-Universal:Subject:To:CC:References:From:X-Nvconfidentiality: Message-ID:Date:User-Agent:MIME-Version:In-Reply-To: X-Originating-IP:X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=OvJoiMhGmIDpiVNUmKclWvLO36Hu8mVLDqpSVxfPfxDWXLj1Qk/5tzPSf6+BvLm7X HRUA5Mhctx9Sc1Z5x6G1w2/73K8d4qxY6qeNP5M8cj786M3ap3d4QR9pBTAaBmDrby H3YMPNpBCkSyQC2dSpCe0dxg+9J5AqHgejWrIEuH09XsWwjshvUkQJ3ywDH98/Yppq 6Sni4ipqB3M5ld/Y1KReGpdtZEZ5gITxBSrOdu2NL56bycs63l62mtl7jlF323b6ri UM4KhehiRZ+BCzZrBifRD6LZyOIcKdx6P35tDKFBbmCc9hFSegBapQxblpFYKQGbWn 6FWA9PZbDvQZA== X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Song Liu , Michal Hocko , "Dmitry V. Levin" , Keith Busch , linux-mm@kvack.org, Paul Mackerras , Christoph Lameter , Ira Weiny , Dan Williams , Elena Reshetova , linux-arch@vger.kernel.org, Santosh Sivaraj , Davidlohr Bueso , "Aneesh Kumar K.V" , Bartlomiej Zolnierkiewicz , Mike Rapoport , Jason Gunthorpe , Vlastimil Babka , Mahesh Salgaonkar , Andrey Ryabinin , Alexey Dobriyan , Ingo Molnar , Andrea Arcangeli , Ralph Campbell , Arnd Bergmann , Jann Horn , Jesper Dangaard Brouer , Nicholas Piggin , =?UTF-8?B?SsOpcsO0bWUgR2xpc3Nl?= , Mathieu Desnoyers , kvm-ppc@vger.kernel.org, Thomas Gleixner , Reza Arbab , Allison Randal , Paul McKenney , Christian Brauner , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Logan Gunthorpe , Souptick Joarder , Andrew Morton , linuxppc-dev@lists.ozlabs.org, Roman Gushchin , "Kirill A. Shutemov" , Al Viro Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 10/3/19 4:51 AM, Peter Zijlstra wrote: > On Thu, Oct 03, 2019 at 09:11:45AM +0200, Peter Zijlstra wrote: >> On Wed, Oct 02, 2019 at 10:33:15PM -0300, Leonardo Bras wrote: ... > > I'm still really confused about this barrier. It just doesn't make > sense. > > If an interrupt happens before the local_irq_disable()/save(), then it > will discard any and all speculation that would be in progress to handle > the exception. > Hi Peter, So, would that imply that it's correct to apply approximately the following patch: diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 1adbb8a371c7..cf41eff37e24 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -2099,9 +2099,9 @@ INTERRUPT DISABLING FUNCTIONS ----------------------------- Functions that disable interrupts (ACQUIRE equivalent) and enable interrupts -(RELEASE equivalent) will act as compiler barriers only. So if memory or I/O -barriers are required in such a situation, they must be provided from some -other means. +(RELEASE equivalent) will act as full memory barriers. This is because, for +all supported CPU architectures, interrupt arrival causes all speculative +memory accesses to be discarded. ? We're also discussing this over in [1] ("mm: don't expose non-hugetlb page to fast gup prematurely"), so I'm adding Paul to this thread here as well. [1] https://lore.kernel.org/r/20191002092447.GC9320@quack2.suse.cz thanks, -- John Hubbard NVIDIA