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Wed, 28 Sep 2022 02:05:44 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D06384C04E; Wed, 28 Sep 2022 02:05:44 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 78C544C04A; Wed, 28 Sep 2022 02:05:44 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 28 Sep 2022 02:05:44 +0000 (GMT) Received: from [10.61.2.107] (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id ABFBB600E1; Wed, 28 Sep 2022 11:30:02 +1000 (AEST) Message-ID: Subject: Re: [PATCH v2 1/6] powerpc/code-patching: Implement generic text patching function From: Benjamin Gray To: Christophe Leroy , "linuxppc-dev@lists.ozlabs.org" Date: Wed, 28 Sep 2022 11:30:02 +1000 In-Reply-To: <7c06a079-4189-e09f-939e-f672e7ff1ab1@csgroup.eu> References: <20220926064316.765967-1-bgray@linux.ibm.com> <20220926064316.765967-2-bgray@linux.ibm.com> <7c06a079-4189-e09f-939e-f672e7ff1ab1@csgroup.eu> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4 (3.44.4-1.fc36) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 2ij_mw4TWUyx55BIrtWzNS622Yjkjad6 X-Proofpoint-ORIG-GUID: V0we8_xx3bAs_1-EuEZSmQSndzH2J7BS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-27_12,2022-09-27_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 phishscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209280011 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "ajd@linux.ibm.com" , "peterz@infradead.org" , "npiggin@gmail.com" , "ardb@kernel.org" , "jbaron@akamai.com" , "rostedt@goodmis.org" , "jpoimboe@kernel.org" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, 2022-09-27 at 06:40 +0000, Christophe Leroy wrote: > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0/* Flush on the EA that may = be executed in case of a non- > > coherent icache */ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0icbi(prog_addr); >=20 > prog_addr is a misleading name ? Is that the address at which you=20 > program it ? Is that the address the programs runs at ? >=20 > exec_addr was a lot more explicit as it clearly defines the address > at=20 > which the code is executed. I'm not sure what it could be confused for other than "the address the program uses" (be it uses for executing, or uses as data).=C2=A0I just called it that because it's not necessarily executed, so 'exec_addr' is misleading (to the extent it matters in the first place...). > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (IS_ENABLED(CONFIG_PPC64)= && L1_CACHE_BYTES < 64) > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0icbi(prog_addr + size - 1); >=20 > This doesn't exist today. >=20 > I'd rather have: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0BUILD_BUG_ON(IS_ENABLED(C= ONFIG_PPC64) && L1_CACHE_BYTES < > 64); Sure, I can adjust the style. > > +static int __always_inline __do_patch_memory(void *dest, unsigned > > long src, size_t size) > > =C2=A0 { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0int err; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0u32 *patch_addr; > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0unsigned long text_poke_addr= ; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pte_t *pte; > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0unsigned long pfn =3D get_pa= tch_pfn(addr); > > - > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0text_poke_addr =3D (unsigned > > long)__this_cpu_read(text_poke_area)->addr & PAGE_MASK; > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0patch_addr =3D (u32 *)(text_= poke_addr + > > offset_in_page(addr)); > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0unsigned long text_poke_addr= =3D (unsigned > > long)__this_cpu_read(text_poke_area)->addr & PAGE_MASK; > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0unsigned long pfn =3D get_pa= tch_pfn(dest); > >=20 > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0patch_addr =3D (u32 *)(text_= poke_addr + > > offset_in_page(dest)); >=20 > Can we avoid this churn ? > Ok, you want to change 'addr' to 'dest', can we leave everything else > as=20 > is ? 'addr' was only renamed because the v1 used a pointer to the data, so 'addr' was ambiguous. I'll restore it to 'addr' for v3. I'll also restore the formatting.